22 #define DIV_TO_RATE(input_rate, div)	((input_rate) / ((div) + 1))  macro
182 			rate = DIV_TO_RATE(priv->cpll_hz , div);  in rk3576_bus_get_clk()
184 			rate = DIV_TO_RATE(priv->gpll_hz, div);  in rk3576_bus_get_clk()
293 		return DIV_TO_RATE(prate, div);  in rk3576_top_get_clk()
304 		return DIV_TO_RATE(prate, div);  in rk3576_top_get_clk()
706 		return DIV_TO_RATE(prate, div);  in rk3576_adc_get_clk()
712 		return DIV_TO_RATE(prate, div);  in rk3576_adc_get_clk()
780 		return DIV_TO_RATE(prate, div);  in rk3576_mmc_get_clk()
793 		return DIV_TO_RATE(prate, div);  in rk3576_mmc_get_clk()
806 		return DIV_TO_RATE(prate, div);  in rk3576_mmc_get_clk()
819 		return DIV_TO_RATE(prate, div);  in rk3576_mmc_get_clk()
831 		return DIV_TO_RATE(prate, div);  in rk3576_mmc_get_clk()
843 		return DIV_TO_RATE(prate, div);  in rk3576_mmc_get_clk()
852 		return DIV_TO_RATE(prate, div);  in rk3576_mmc_get_clk()
990 		return DIV_TO_RATE(parent, div);  in rk3576_aclk_vop_get_clk()
1003 		return DIV_TO_RATE(parent, div);  in rk3576_aclk_vop_get_clk()
1016 		return DIV_TO_RATE(parent, div);  in rk3576_aclk_vop_get_clk()
1167 	return DIV_TO_RATE(parent, div);  in rk3576_dclk_vop_get_clk()
1311 	return DIV_TO_RATE(parent, div);  in rk3576_clk_csihost_get_clk()
1406 		return DIV_TO_RATE(parent, div);  in rk3576_dclk_ebc_get_clk()
1575 		return DIV_TO_RATE(p_rate, div);  in rk3576_gmac_get_clk()
1587 		return DIV_TO_RATE(p_rate, div);  in rk3576_gmac_get_clk()
1591 		return DIV_TO_RATE(priv->cpll_hz, div);  in rk3576_gmac_get_clk()
1595 		return DIV_TO_RATE(priv->cpll_hz, div);  in rk3576_gmac_get_clk()
1832 	return DIV_TO_RATE(p_rate, div);  in rk3576_uart_get_rate()
1959 	return DIV_TO_RATE(p_rate, div);  in rk3576_ref_clkout_get_clk()