205 	u32 sel, con, div;  in rk3562_bus_get_rate()  local
211 		sel = (con & ACLK_BUS_SEL_MASK) >> ACLK_BUS_SEL_SHIFT;  in rk3562_bus_get_rate()
216 		sel = (con & HCLK_BUS_SEL_MASK) >> HCLK_BUS_SEL_SHIFT;  in rk3562_bus_get_rate()
221 		sel = (con & PCLK_BUS_SEL_MASK) >> PCLK_BUS_SEL_SHIFT;  in rk3562_bus_get_rate()
228 	if (sel == ACLK_BUS_SEL_CPLL)  in rk3562_bus_get_rate()
240 	u32 sel, div;  in rk3562_bus_set_rate()  local
243 		sel = ACLK_BUS_SEL_CPLL;  in rk3562_bus_set_rate()
246 		sel= ACLK_BUS_SEL_GPLL;  in rk3562_bus_set_rate()
254 			     (sel << ACLK_BUS_SEL_SHIFT) |  in rk3562_bus_set_rate()
260 			     (sel << HCLK_BUS_SEL_SHIFT) |  in rk3562_bus_set_rate()
266 			     (sel << PCLK_BUS_SEL_SHIFT) |  in rk3562_bus_set_rate()
279 	u32 sel, con, div;  in rk3562_peri_get_rate()  local
285 		sel = (con & ACLK_PERI_SEL_MASK) >> ACLK_PERI_SEL_SHIFT;  in rk3562_peri_get_rate()
290 		sel = (con & HCLK_PERI_SEL_MASK) >> HCLK_PERI_SEL_SHIFT;  in rk3562_peri_get_rate()
295 		sel = (con & PCLK_PERI_SEL_MASK) >> PCLK_PERI_SEL_SHIFT;  in rk3562_peri_get_rate()
302 	if (sel == ACLK_PERI_SEL_CPLL)  in rk3562_peri_get_rate()
314 	u32 sel, div;  in rk3562_peri_set_rate()  local
317 		sel = ACLK_PERI_SEL_CPLL;  in rk3562_peri_set_rate()
320 		sel= ACLK_PERI_SEL_GPLL;  in rk3562_peri_set_rate()
328 			     (sel << ACLK_PERI_SEL_SHIFT) |  in rk3562_peri_set_rate()
334 			     (sel << HCLK_PERI_SEL_SHIFT) |  in rk3562_peri_set_rate()
340 			     (sel << PCLK_PERI_SEL_SHIFT) |  in rk3562_peri_set_rate()
353 	u32 sel, con, div;  in rk3562_i2c_get_rate()  local
359 		sel = (con & CLK_PMU0_I2C0_SEL_MASK) >> CLK_PMU0_I2C0_SEL_SHIFT;  in rk3562_i2c_get_rate()
360 		if (sel == CLK_PMU0_I2C0_SEL_200M)  in rk3562_i2c_get_rate()
362 		else if (sel == CLK_PMU0_I2C0_SEL_24M)  in rk3562_i2c_get_rate()
376 		sel = (con & CLK_I2C_SEL_MASK) >> CLK_I2C_SEL_SHIFT;  in rk3562_i2c_get_rate()
377 		if (sel == CLK_I2C_SEL_200M)  in rk3562_i2c_get_rate()
379 		else if (sel == CLK_I2C_SEL_100M)  in rk3562_i2c_get_rate()
381 		else if (sel == CLK_I2C_SEL_50M)  in rk3562_i2c_get_rate()
397 	u32 sel, div;  in rk3562_i2c_set_rate()  local
402 			sel = CLK_PMU0_I2C0_SEL_200M;  in rk3562_i2c_set_rate()
405 			sel = CLK_PMU0_I2C0_SEL_24M;  in rk3562_i2c_set_rate()
408 			sel = CLK_PMU0_I2C0_SEL_32K;  in rk3562_i2c_set_rate()
411 			sel = CLK_PMU0_I2C0_SEL_200M;  in rk3562_i2c_set_rate()
418 			     sel << CLK_PMU0_I2C0_SEL_SHIFT);  in rk3562_i2c_set_rate()
426 			sel = CLK_I2C_SEL_200M;  in rk3562_i2c_set_rate()
428 			sel = CLK_I2C_SEL_100M;  in rk3562_i2c_set_rate()
430 			sel = CLK_I2C_SEL_50M;  in rk3562_i2c_set_rate()
432 			sel = CLK_I2C_SEL_24M;  in rk3562_i2c_set_rate()
434 			     sel << CLK_I2C_SEL_SHIFT);  in rk3562_i2c_set_rate()
626 	u32 sel, con, div, mask, shift;  in rk3562_pwm_get_rate()  local
632 		sel = (con & CLK_PMU1_PWM0_SEL_MASK) >> CLK_PMU1_PWM0_SEL_SHIFT;  in rk3562_pwm_get_rate()
633 		if (sel == CLK_PMU1_PWM0_SEL_200M)  in rk3562_pwm_get_rate()
635 		else if (sel == CLK_PMU1_PWM0_SEL_24M)  in rk3562_pwm_get_rate()
659 	sel = (con & mask) >> shift;  in rk3562_pwm_get_rate()
660 	if (sel == CLK_PWM_SEL_100M)  in rk3562_pwm_get_rate()
662 	else if (sel == CLK_PWM_SEL_50M)  in rk3562_pwm_get_rate()
674 	u32 sel, div, mask, shift;  in rk3562_pwm_set_rate()  local
679 			sel = CLK_PMU1_PWM0_SEL_200M;  in rk3562_pwm_set_rate()
682 			sel = CLK_PMU1_PWM0_SEL_24M;  in rk3562_pwm_set_rate()
685 			sel = CLK_PMU1_PWM0_SEL_32K;  in rk3562_pwm_set_rate()
688 			sel = CLK_PMU1_PWM0_SEL_200M;  in rk3562_pwm_set_rate()
695 			     sel << CLK_PMU1_PWM0_SEL_SHIFT);  in rk3562_pwm_set_rate()
715 		sel = CLK_PWM_SEL_100M;  in rk3562_pwm_set_rate()
717 		sel = CLK_PWM_SEL_50M;  in rk3562_pwm_set_rate()
719 		sel = CLK_PWM_SEL_24M;  in rk3562_pwm_set_rate()
720 	rk_clrsetreg(&cru->periclksel_con[40], mask, sel << shift);  in rk3562_pwm_set_rate()
728 	u32 sel, con, div, mask, shift;  in rk3562_spi_get_rate()  local
734 		sel = (con & CLK_PMU1_SPI0_SEL_MASK) >> CLK_PMU1_SPI0_SEL_SHIFT;  in rk3562_spi_get_rate()
735 		if (sel == CLK_PMU1_SPI0_SEL_200M)  in rk3562_spi_get_rate()
737 		else if (sel == CLK_PMU1_SPI0_SEL_24M)  in rk3562_spi_get_rate()
757 	sel = (con & mask) >> shift;  in rk3562_spi_get_rate()
758 	if (sel == CLK_SPI_SEL_200M)  in rk3562_spi_get_rate()
760 	else if (sel == CLK_SPI_SEL_100M)  in rk3562_spi_get_rate()
762 	else if (sel == CLK_SPI_SEL_50M)  in rk3562_spi_get_rate()
774 	u32 sel, div, mask, shift;  in rk3562_spi_set_rate()  local
779 			sel = CLK_PMU1_SPI0_SEL_200M;  in rk3562_spi_set_rate()
782 			sel = CLK_PMU1_SPI0_SEL_24M;  in rk3562_spi_set_rate()
785 			sel = CLK_PMU1_SPI0_SEL_32K;  in rk3562_spi_set_rate()
788 			sel = CLK_PMU1_SPI0_SEL_200M;  in rk3562_spi_set_rate()
795 			     sel << CLK_PMU1_SPI0_SEL_SHIFT);  in rk3562_spi_set_rate()
811 		sel = CLK_SPI_SEL_200M;  in rk3562_spi_set_rate()
813 		sel = CLK_SPI_SEL_100M;  in rk3562_spi_set_rate()
815 		sel = CLK_SPI_SEL_50M;  in rk3562_spi_set_rate()
817 		sel = CLK_SPI_SEL_24M;  in rk3562_spi_set_rate()
818 	rk_clrsetreg(&cru->periclksel_con[20], mask, sel << shift);  in rk3562_spi_set_rate()
918 	u32 div, sel, con, parent;  in rk3562_sfc_get_rate()  local
922 	sel = (con & SCLK_SFC_SEL_MASK) >> SCLK_SFC_SEL_SHIFT;  in rk3562_sfc_get_rate()
923 	if (sel == SCLK_SFC_SRC_SEL_GPLL)  in rk3562_sfc_get_rate()
925 	else if (sel == SCLK_SFC_SRC_SEL_CPLL)  in rk3562_sfc_get_rate()
936 	int div, sel;  in rk3562_sfc_set_rate()  local
940 		sel = SCLK_SFC_SRC_SEL_24M;  in rk3562_sfc_set_rate()
943 		sel = SCLK_SFC_SRC_SEL_CPLL;  in rk3562_sfc_set_rate()
946 		sel = SCLK_SFC_SRC_SEL_GPLL;  in rk3562_sfc_set_rate()
952 		     sel << SCLK_SFC_SEL_SHIFT |  in rk3562_sfc_set_rate()
961 	u32 div, sel, con, parent;  in rk3562_emmc_get_rate()  local
967 		sel = (con & CCLK_EMMC_SEL_MASK) >> CCLK_EMMC_SEL_SHIFT;  in rk3562_emmc_get_rate()
968 		if (sel == CCLK_EMMC_SEL_GPLL)  in rk3562_emmc_get_rate()
970 		else if (sel == CCLK_EMMC_SEL_CPLL)  in rk3562_emmc_get_rate()
972 		else if (sel == CCLK_EMMC_SEL_HPLL)  in rk3562_emmc_get_rate()
980 		sel = (con & BCLK_EMMC_SEL_MASK) >> BCLK_EMMC_SEL_SHIFT;  in rk3562_emmc_get_rate()
981 		if (sel == BCLK_EMMC_SEL_GPLL)  in rk3562_emmc_get_rate()
997 	int div, sel;  in rk3562_emmc_set_rate()  local
1003 			sel = CCLK_EMMC_SEL_24M;  in rk3562_emmc_set_rate()
1006 			sel = CCLK_EMMC_SEL_CPLL;  in rk3562_emmc_set_rate()
1009 			sel = CCLK_EMMC_SEL_HPLL;  in rk3562_emmc_set_rate()
1012 			sel = CCLK_EMMC_SEL_GPLL;  in rk3562_emmc_set_rate()
1016 			     sel << CCLK_EMMC_SEL_SHIFT |  in rk3562_emmc_set_rate()
1022 			sel = BCLK_EMMC_SEL_CPLL;  in rk3562_emmc_set_rate()
1025 			sel = BCLK_EMMC_SEL_GPLL;  in rk3562_emmc_set_rate()
1029 			     sel << BCLK_EMMC_SEL_SHIFT |  in rk3562_emmc_set_rate()
1042 	u32 div, sel, con;  in rk3562_sdmmc_get_rate()  local
1051 		sel = (con & CCLK_SDMMC0_SEL_MASK) >> CCLK_SDMMC0_SEL_SHIFT;  in rk3562_sdmmc_get_rate()
1058 		sel = (con & CCLK_SDMMC1_SEL_MASK) >> CCLK_SDMMC1_SEL_SHIFT;  in rk3562_sdmmc_get_rate()
1064 	if (sel == CCLK_SDMMC_SEL_GPLL)  in rk3562_sdmmc_get_rate()
1066 	else if (sel == CCLK_SDMMC_SEL_CPLL)  in rk3562_sdmmc_get_rate()
1068 	else if (sel == CCLK_SDMMC_SEL_HPLL)  in rk3562_sdmmc_get_rate()
1080 	u32 div, sel;  in rk3562_sdmmc_set_rate()  local
1084 		sel = CCLK_SDMMC_SEL_24M;  in rk3562_sdmmc_set_rate()
1087 		sel = CCLK_SDMMC_SEL_CPLL;  in rk3562_sdmmc_set_rate()
1090 		sel = CCLK_SDMMC_SEL_HPLL;  in rk3562_sdmmc_set_rate()
1093 		sel = CCLK_SDMMC_SEL_CPLL;  in rk3562_sdmmc_set_rate()
1101 			     sel << CCLK_SDMMC0_SEL_SHIFT |  in rk3562_sdmmc_set_rate()
1108 			     sel << CCLK_SDMMC1_SEL_SHIFT |  in rk3562_sdmmc_set_rate()
1121 	u32 con, sel, div;  in rk3562_vop_get_rate()  local
1128 		sel = (con & ACLK_VOP_SEL_MASK) >> ACLK_VOP_SEL_SHIFT;  in rk3562_vop_get_rate()
1129 		if (sel == ACLK_VOP_SEL_GPLL)  in rk3562_vop_get_rate()
1131 		else if (sel == ACLK_VOP_SEL_CPLL)  in rk3562_vop_get_rate()
1133 		else if (sel == ACLK_VOP_SEL_HPLL)  in rk3562_vop_get_rate()
1135 		else if (sel == ACLK_VOP_SEL_VPLL)  in rk3562_vop_get_rate()
1144 		sel = (con & DCLK_VOP_SEL_MASK) >> DCLK_VOP_SEL_SHIFT;  in rk3562_vop_get_rate()
1145 		if (sel == DCLK_VOP_SEL_VPLL)  in rk3562_vop_get_rate()
1153 		sel = (con & DCLK_VOP1_SEL_MASK) >> DCLK_VOP1_SEL_SHIFT;  in rk3562_vop_get_rate()
1159 	if (sel == DCLK_VOP_SEL_GPLL)  in rk3562_vop_get_rate()
1161 	else if (sel == DCLK_VOP_SEL_HPLL)  in rk3562_vop_get_rate()
1163 	else if (sel == DCLK_VOP_SEL_VPLL)  in rk3562_vop_get_rate()
1177 	u32 i, div, sel, best_div = 0, best_sel = 0;  in rk3562_vop_set_rate()  local
1184 			sel = ACLK_VOP_SEL_CPLL;  in rk3562_vop_set_rate()
1187 			sel = ACLK_VOP_SEL_HPLL;  in rk3562_vop_set_rate()
1190 			sel = ACLK_VOP_SEL_VPLL;  in rk3562_vop_set_rate()
1193 			sel = ACLK_VOP_SEL_GPLL;  in rk3562_vop_set_rate()
1197 			     sel << ACLK_VOP_SEL_SHIFT |  in rk3562_vop_set_rate()
1261 	u32 con, sel, div;  in rk3562_gmac_get_rate()  local
1267 		sel = (con & CLK_GMAC_125M_SEL_MASK) >> CLK_GMAC_125M_SEL_SHIFT;  in rk3562_gmac_get_rate()
1268 		if (sel == CLK_GMAC_125M)  in rk3562_gmac_get_rate()
1274 		sel = (con & CLK_GMAC_50M_SEL_MASK) >> CLK_GMAC_50M_SEL_SHIFT;  in rk3562_gmac_get_rate()
1275 		if (sel == CLK_GMAC_50M)  in rk3562_gmac_get_rate()
1281 		sel = (con & CLK_GMAC_50M_SEL_MASK) >> CLK_GMAC_50M_SEL_SHIFT;  in rk3562_gmac_get_rate()
1282 		if (sel == CLK_GMAC_50M)  in rk3562_gmac_get_rate()
1288 		sel = (con & CLK_GMAC_ETH_OUT2IO_SEL_MASK) >> CLK_GMAC_ETH_OUT2IO_SEL_SHIFT;  in rk3562_gmac_get_rate()
1290 		if (sel == CLK_GMAC_ETH_OUT2IO_GPLL)  in rk3562_gmac_get_rate()
1306 	u32 sel, div;  in rk3562_gmac_set_rate()  local
1311 			sel = CLK_GMAC_125M;  in rk3562_gmac_set_rate()
1313 			sel = CLK_GMAC_24M;  in rk3562_gmac_set_rate()
1315 			     sel << CLK_GMAC_125M_SEL_SHIFT);  in rk3562_gmac_set_rate()
1319 			sel = CLK_GMAC_50M;  in rk3562_gmac_set_rate()
1321 			sel = CLK_GMAC_24M;  in rk3562_gmac_set_rate()
1323 			     sel << CLK_GMAC_50M_SEL_SHIFT);  in rk3562_gmac_set_rate()
1327 			sel = CLK_GMAC_50M;  in rk3562_gmac_set_rate()
1329 			sel = CLK_GMAC_24M;  in rk3562_gmac_set_rate()
1331 			     sel << CLK_GMAC_50M_SEL_SHIFT);  in rk3562_gmac_set_rate()
1336 			sel = CLK_GMAC_ETH_OUT2IO_CPLL;  in rk3562_gmac_set_rate()
1339 			sel = CLK_GMAC_ETH_OUT2IO_GPLL;  in rk3562_gmac_set_rate()
1343 			     sel << CLK_GMAC_ETH_OUT2IO_SEL_SHIFT |  in rk3562_gmac_set_rate()
1930 	u32 sel, con;  in rk3562_crypto_get_rate()  local
1936 		sel = (con & CLK_CORE_CRYPTO_SEL_MASK) >>  in rk3562_crypto_get_rate()
1938 		if (sel == CLK_CORE_CRYPTO_SEL_200M)  in rk3562_crypto_get_rate()
1940 		else if (sel == CLK_CORE_CRYPTO_SEL_100M)  in rk3562_crypto_get_rate()
1946 		sel = (con & CLK_PKA_CRYPTO_SEL_MASK) >>  in rk3562_crypto_get_rate()
1948 		if (sel == CLK_PKA_CRYPTO_SEL_300M)  in rk3562_crypto_get_rate()
1950 		else if (sel == CLK_PKA_CRYPTO_SEL_200M)  in rk3562_crypto_get_rate()
1952 		else if (sel == CLK_PKA_CRYPTO_SEL_100M)  in rk3562_crypto_get_rate()
1968 	u32 mask, shift, sel;  in rk3562_crypto_set_rate()  local
1975 			sel = CLK_CORE_CRYPTO_SEL_200M;  in rk3562_crypto_set_rate()
1977 			sel = CLK_CORE_CRYPTO_SEL_100M;  in rk3562_crypto_set_rate()
1979 			sel = CLK_CORE_CRYPTO_SEL_24M;  in rk3562_crypto_set_rate()
1985 			sel = CLK_PKA_CRYPTO_SEL_300M;  in rk3562_crypto_set_rate()
1987 			sel = CLK_PKA_CRYPTO_SEL_200M;  in rk3562_crypto_set_rate()
1989 			sel = CLK_PKA_CRYPTO_SEL_100M;  in rk3562_crypto_set_rate()
1991 			sel = CLK_PKA_CRYPTO_SEL_24M;  in rk3562_crypto_set_rate()
1996 	rk_clrsetreg(&cru->periclksel_con[43], mask, sel << shift);  in rk3562_crypto_set_rate()