Lines Matching full:else
178 } else if (old_rate > new_rate) { in rk3562_armclk_set_rate()
187 } else if (old_rate < new_rate) { in rk3562_armclk_set_rate()
230 else in rk3562_bus_get_rate()
245 } else { in rk3562_bus_set_rate()
304 else in rk3562_peri_get_rate()
319 } else { in rk3562_peri_set_rate()
362 else if (sel == CLK_PMU0_I2C0_SEL_24M) in rk3562_i2c_get_rate()
364 else in rk3562_i2c_get_rate()
379 else if (sel == CLK_I2C_SEL_100M) in rk3562_i2c_get_rate()
381 else if (sel == CLK_I2C_SEL_50M) in rk3562_i2c_get_rate()
383 else in rk3562_i2c_get_rate()
404 } else if (rate == OSC_HZ) { in rk3562_i2c_set_rate()
407 } else if (rate == 32768) { in rk3562_i2c_set_rate()
410 } else { in rk3562_i2c_set_rate()
427 else if (rate == 100 * MHz) in rk3562_i2c_set_rate()
429 else if (rate == 50 * MHz) in rk3562_i2c_set_rate()
431 else in rk3562_i2c_set_rate()
459 } else if (src == CLK_UART_SEL_FRAC) { in rk3562_uart_get_rate()
466 } else { in rk3562_uart_get_rate()
505 else in rk3562_uart_get_rate()
509 } else if (src == CLK_UART_SEL_FRAC) { in rk3562_uart_get_rate()
516 } else { in rk3562_uart_get_rate()
533 } else if (rate == OSC_HZ) { in rk3562_uart_set_rate()
536 } else { in rk3562_uart_set_rate()
591 } else if (priv->cpll_hz % rate == 0) { in rk3562_uart_set_rate()
595 } else if (rate == OSC_HZ) { in rk3562_uart_set_rate()
599 } else { in rk3562_uart_set_rate()
635 else if (sel == CLK_PMU1_PWM0_SEL_24M) in rk3562_pwm_get_rate()
637 else in rk3562_pwm_get_rate()
662 else if (sel == CLK_PWM_SEL_50M) in rk3562_pwm_get_rate()
664 else in rk3562_pwm_get_rate()
681 } else if (rate == OSC_HZ) { in rk3562_pwm_set_rate()
684 } else if (rate == 32768) { in rk3562_pwm_set_rate()
687 } else { in rk3562_pwm_set_rate()
716 else if (rate == 50 * MHz) in rk3562_pwm_set_rate()
718 else in rk3562_pwm_set_rate()
737 else if (sel == CLK_PMU1_SPI0_SEL_24M) in rk3562_spi_get_rate()
739 else in rk3562_spi_get_rate()
760 else if (sel == CLK_SPI_SEL_100M) in rk3562_spi_get_rate()
762 else if (sel == CLK_SPI_SEL_50M) in rk3562_spi_get_rate()
764 else in rk3562_spi_get_rate()
781 } else if (rate == OSC_HZ) { in rk3562_spi_set_rate()
784 } else if (rate == 32768) { in rk3562_spi_set_rate()
787 } else { in rk3562_spi_set_rate()
812 else if (rate == 100 * MHz) in rk3562_spi_set_rate()
814 else if (rate == 50 * MHz) in rk3562_spi_set_rate()
816 else in rk3562_spi_set_rate()
925 else if (sel == SCLK_SFC_SRC_SEL_CPLL) in rk3562_sfc_get_rate()
927 else in rk3562_sfc_get_rate()
941 } else if ((priv->cpll_hz % rate) == 0) { in rk3562_sfc_set_rate()
944 } else { in rk3562_sfc_set_rate()
970 else if (sel == CCLK_EMMC_SEL_CPLL) in rk3562_emmc_get_rate()
972 else if (sel == CCLK_EMMC_SEL_HPLL) in rk3562_emmc_get_rate()
974 else in rk3562_emmc_get_rate()
983 else in rk3562_emmc_get_rate()
1004 } else if ((priv->cpll_hz % rate) == 0) { in rk3562_emmc_set_rate()
1007 } else if ((priv->hpll_hz % rate) == 0) { in rk3562_emmc_set_rate()
1010 } else { in rk3562_emmc_set_rate()
1023 } else { in rk3562_emmc_set_rate()
1066 else if (sel == CCLK_SDMMC_SEL_CPLL) in rk3562_sdmmc_get_rate()
1068 else if (sel == CCLK_SDMMC_SEL_HPLL) in rk3562_sdmmc_get_rate()
1070 else in rk3562_sdmmc_get_rate()
1085 } else if ((priv->cpll_hz % rate) == 0) { in rk3562_sdmmc_set_rate()
1088 } else if ((priv->hpll_hz % rate) == 0) { in rk3562_sdmmc_set_rate()
1091 } else { in rk3562_sdmmc_set_rate()
1131 else if (sel == ACLK_VOP_SEL_CPLL) in rk3562_vop_get_rate()
1133 else if (sel == ACLK_VOP_SEL_HPLL) in rk3562_vop_get_rate()
1135 else if (sel == ACLK_VOP_SEL_VPLL) in rk3562_vop_get_rate()
1137 else in rk3562_vop_get_rate()
1161 else if (sel == DCLK_VOP_SEL_HPLL) in rk3562_vop_get_rate()
1163 else if (sel == DCLK_VOP_SEL_VPLL) in rk3562_vop_get_rate()
1165 else in rk3562_vop_get_rate()
1185 } else if ((priv->hpll_hz % rate) == 0) { in rk3562_vop_set_rate()
1188 } else if ((priv->vpll_hz % rate) == 0) { in rk3562_vop_set_rate()
1191 } else { in rk3562_vop_set_rate()
1246 } else { in rk3562_vop_set_rate()
1270 else in rk3562_gmac_get_rate()
1277 else in rk3562_gmac_get_rate()
1284 else in rk3562_gmac_get_rate()
1292 else in rk3562_gmac_get_rate()
1312 else in rk3562_gmac_set_rate()
1320 else in rk3562_gmac_set_rate()
1328 else in rk3562_gmac_set_rate()
1337 } else { in rk3562_gmac_set_rate()
1623 else if (clk->id == SCLK_SDMMC0_SAMPLE) in rk3562_mmc_get_phase()
1625 else in rk3562_mmc_get_phase()
1676 else in rk3562_mmc_set_phase()
1770 else in soc_clk_dump()
1773 } else { in soc_clk_dump()
1777 else in soc_clk_dump()
1804 #else in rk3562_clk_init()
1818 } else { in rk3562_clk_init()
1856 else in rk3562_clk_probe()
1883 } else { in rk3562_clk_bind()
1896 } else { in rk3562_clk_bind()
1940 else if (sel == CLK_CORE_CRYPTO_SEL_100M) in rk3562_crypto_get_rate()
1942 else in rk3562_crypto_get_rate()
1950 else if (sel == CLK_PKA_CRYPTO_SEL_200M) in rk3562_crypto_get_rate()
1952 else if (sel == CLK_PKA_CRYPTO_SEL_100M) in rk3562_crypto_get_rate()
1954 else in rk3562_crypto_get_rate()
1976 else if (rate == 100 * MHz) in rk3562_crypto_set_rate()
1978 else in rk3562_crypto_set_rate()
1986 else if (rate == 200 * MHz) in rk3562_crypto_set_rate()
1988 else if (rate == 100 * MHz) in rk3562_crypto_set_rate()
1990 else in rk3562_crypto_set_rate()