Lines Matching refs:assert
376 assert(vco_khz >= VCO_MIN_KHZ && vco_khz <= VCO_MAX_KHZ && in rkclk_set_pll()
537 assert((aclkm_div + 1) * ACLKM_CORE_HZ <= apll_hz && in rk3399_configure_cpu()
541 assert((pclk_dbg_div + 1) * PCLK_DBG_HZ <= apll_hz && in rk3399_configure_cpu()
545 assert((atclk_div + 1) * ATCLK_CORE_HZ <= apll_hz && in rk3399_configure_cpu()
627 assert(src_clk_div - 1 <= 127); in rk3399_i2c_set_clk()
726 assert(src_clk_div < 128); in rk3399_spi_set_clk()
770 assert(div - 1 <= 31); in rk3399_vop_set_clk()
842 assert(src_clk_div - 1 < 128); in rk3399_mmc_set_clk()
857 assert(src_clk_div - 1 < 32); in rk3399_mmc_set_clk()
869 assert(src_clk_div - 1 < 128); in rk3399_mmc_set_clk()
974 assert(src_clk_div <= 255); in rk3399_saradc_set_clk()
999 assert(src_clk_div <= 255); in rk3399_tsadc_set_clk()
1039 assert(src_clk_div - 1 <= 31); in rk3399_crypto_set_clk()
1426 assert((hclk_div + 1) * PERIHP_HCLK_HZ <= in rkclk_init()
1430 assert((pclk_div + 1) * PERIHP_PCLK_HZ <= in rkclk_init()
1445 assert((hclk_div + 1) * PERILP0_HCLK_HZ <= in rkclk_init()
1449 assert((pclk_div + 1) * PERILP0_PCLK_HZ <= in rkclk_init()
1462 assert((hclk_div + 1) * PERILP1_HCLK_HZ <= in rkclk_init()
1466 assert((pclk_div + 1) * PERILP1_PCLK_HZ <= in rkclk_init()
1630 assert(src_clk_div - 1 < 127); in rk3399_i2c_set_pmuclk()