539 	int src_clk_div;  in rk3368_spi_set_clk()  local
541 	src_clk_div = DIV_ROUND_UP(GPLL_HZ, hz);  in rk3368_spi_set_clk()
542 	assert(src_clk_div < 127);  in rk3368_spi_set_clk()
557 		     ((src_clk_div << spiclk->div_shift) |  in rk3368_spi_set_clk()
576 	int src_clk_div;  in rk3368_saradc_set_clk()  local
578 	src_clk_div = DIV_ROUND_UP(OSC_HZ, hz) - 1;  in rk3368_saradc_set_clk()
579 	assert(src_clk_div < 128);  in rk3368_saradc_set_clk()
583 		     src_clk_div << CLK_SARADC_DIV_CON_SHIFT);  in rk3368_saradc_set_clk()
622 	int src_clk_div;  in rk3368_bus_set_clk()  local
630 		src_clk_div = DIV_ROUND_UP(rkclk_pll_get_rate(cru, GPLL), hz);  in rk3368_bus_set_clk()
631 		assert(src_clk_div - 1 < 31);  in rk3368_bus_set_clk()
635 			     (src_clk_div - 1) << ACLK_BUS_DIV_CON_SHIFT);  in rk3368_bus_set_clk()
638 		src_clk_div = DIV_ROUND_UP(rk3368_bus_get_clk(cru,  in rk3368_bus_set_clk()
641 		assert(src_clk_div - 1 < 3);  in rk3368_bus_set_clk()
644 			     (src_clk_div - 1) << HCLK_BUS_DIV_CON_SHIFT);  in rk3368_bus_set_clk()
647 		src_clk_div = DIV_ROUND_UP(rk3368_bus_get_clk(cru,  in rk3368_bus_set_clk()
650 		assert(src_clk_div - 1 < 3);  in rk3368_bus_set_clk()
653 			     (src_clk_div - 1) << PCLK_BUS_DIV_CON_SHIFT);  in rk3368_bus_set_clk()
696 	int src_clk_div;  in rk3368_peri_set_clk()  local
704 		src_clk_div = DIV_ROUND_UP(rkclk_pll_get_rate(cru, GPLL), hz);  in rk3368_peri_set_clk()
705 		assert(src_clk_div - 1 < 31);  in rk3368_peri_set_clk()
709 			     (src_clk_div - 1) << ACLK_PERI_DIV_CON_SHIFT);  in rk3368_peri_set_clk()
712 		src_clk_div = DIV_ROUND_UP(rk3368_peri_get_clk(cru,  in rk3368_peri_set_clk()
715 		assert(src_clk_div - 1 < 3);  in rk3368_peri_set_clk()
718 			     (src_clk_div - 1) << HCLK_PERI_DIV_CON_SHIFT);  in rk3368_peri_set_clk()
721 		src_clk_div = DIV_ROUND_UP(rk3368_peri_get_clk(cru,  in rk3368_peri_set_clk()
724 		assert(src_clk_div - 1 < 3);  in rk3368_peri_set_clk()
727 			     (src_clk_div - 1) << PCLK_PERI_DIV_CON_SHIFT);  in rk3368_peri_set_clk()
852 	int src_clk_div;  in rk3368_crypto_set_rate()  local
856 	src_clk_div = DIV_ROUND_UP(p_rate, hz) - 1;  in rk3368_crypto_set_rate()
857 	assert(src_clk_div < 3);  in rk3368_crypto_set_rate()
861 		     src_clk_div << CLK_CRYPTO_DIV_CON_SHIFT);  in rk3368_crypto_set_rate()