Lines Matching refs:nf
34 u32 nf; member
43 .nf = _nf, \
107 .nr = _nr, .nf = (u32)((u64)hz * _nr * _no / OSC_HZ), .no = _no}; \
144 uint ref_khz = OSC_HZ / 1000, nr, nf = 0; in pll_para_config() local
166 div->nf = best_div->nf; in pll_para_config()
196 nf = vco_khz / fref_khz; in pll_para_config()
197 if (nf >= max_nf) in pll_para_config()
199 diff_khz = vco_khz - nf * fref_khz; in pll_para_config()
200 if (nf + 1 < max_nf && diff_khz > fref_khz / 2) { in pll_para_config()
201 nf++; in pll_para_config()
210 div->nf = nf; in pll_para_config()
226 uint32_t nr, no, nf; in rkclk_pll_get_rate() local
240 nf = ((con & PLL_NF_MASK) >> PLL_NF_SHIFT) + 1; in rkclk_pll_get_rate()
242 return (24 * nf / (nr * no)) * 1000000; in rkclk_pll_get_rate()
254 uint vco_hz = OSC_HZ / 1000 * div->nf / div->nr * 1000; in rkclk_set_pll()
258 pll, div->nf, div->nr, div->no, vco_hz, output_hz); in rkclk_set_pll()
267 writel((div->nf - 1) << PLL_NF_SHIFT, &pll->con1); in rkclk_set_pll()
275 clrsetbits_le32(&pll->con2, PLL_BWADJ_MASK, (div->nf >> 1) - 1); in rkclk_set_pll()