Lines Matching refs:src_clk_div
201 int src_clk_div; in rk3328_i2c_set_clk() local
203 src_clk_div = priv->gpll_hz / hz; in rk3328_i2c_set_clk()
204 assert(src_clk_div - 1 < 127); in rk3328_i2c_set_clk()
211 (src_clk_div - 1) << CLK_I2C0_DIV_CON_SHIFT | in rk3328_i2c_set_clk()
218 (src_clk_div - 1) << CLK_I2C1_DIV_CON_SHIFT | in rk3328_i2c_set_clk()
225 (src_clk_div - 1) << CLK_I2C2_DIV_CON_SHIFT | in rk3328_i2c_set_clk()
232 (src_clk_div - 1) << CLK_I2C3_DIV_CON_SHIFT | in rk3328_i2c_set_clk()
240 return DIV_TO_RATE(priv->gpll_hz, src_clk_div); in rk3328_i2c_set_clk()
348 int src_clk_div; in rk3328_mmc_set_clk() local
365 src_clk_div = DIV_ROUND_UP(priv->gpll_hz / 2, set_rate); in rk3328_mmc_set_clk()
367 if (src_clk_div > 127) { in rk3328_mmc_set_clk()
369 src_clk_div = DIV_ROUND_UP(OSC_HZ / 2, set_rate); in rk3328_mmc_set_clk()
373 (src_clk_div - 1) << CLK_EMMC_DIV_CON_SHIFT); in rk3328_mmc_set_clk()
378 (src_clk_div - 1) << CLK_EMMC_DIV_CON_SHIFT); in rk3328_mmc_set_clk()
453 int src_clk_div; in rk3328_saradc_set_clk() local
455 src_clk_div = DIV_ROUND_UP(OSC_HZ, hz) - 1; in rk3328_saradc_set_clk()
456 assert(src_clk_div < 128); in rk3328_saradc_set_clk()
460 src_clk_div << CLK_SARADC_DIV_CON_SHIFT); in rk3328_saradc_set_clk()
480 int src_clk_div; in rk3328_tsadc_set_clk() local
482 src_clk_div = DIV_ROUND_UP(OSC_HZ, hz) - 1; in rk3328_tsadc_set_clk()
483 assert(src_clk_div < 128); in rk3328_tsadc_set_clk()
487 src_clk_div << CLK_SARADC_DIV_CON_SHIFT); in rk3328_tsadc_set_clk()
527 int src_clk_div; in rk3328_vop_set_clk() local
530 src_clk_div = DIV_ROUND_UP(priv->cpll_hz, hz); in rk3328_vop_set_clk()
531 assert(src_clk_div - 1 < 31); in rk3328_vop_set_clk()
539 (src_clk_div - 1) << ACLK_VOP_DIV_CON_SHIFT); in rk3328_vop_set_clk()
546 (src_clk_div - 1) << ACLK_VIO_DIV_CON_SHIFT); in rk3328_vop_set_clk()
550 src_clk_div = DIV_ROUND_UP(rk3328_vop_get_clk(priv, in rk3328_vop_set_clk()
555 (src_clk_div - 1) << HCLK_VIO_DIV_CON_SHIFT); in rk3328_vop_set_clk()
565 src_clk_div = DIV_ROUND_UP(priv->cpll_hz, hz); in rk3328_vop_set_clk()
567 src_clk_div = DIV_ROUND_UP(priv->gpll_hz, hz); in rk3328_vop_set_clk()
571 (src_clk_div - 1) << in rk3328_vop_set_clk()
616 int src_clk_div; in rk3328_bus_set_clk() local
624 src_clk_div = DIV_ROUND_UP(priv->cpll_hz, hz); in rk3328_bus_set_clk()
625 assert(src_clk_div - 1 < 31); in rk3328_bus_set_clk()
626 if (src_clk_div > 32) in rk3328_bus_set_clk()
627 src_clk_div = 32; in rk3328_bus_set_clk()
631 (src_clk_div - 1) << ACLK_BUS_DIV_CON_SHIFT); in rk3328_bus_set_clk()
634 src_clk_div = DIV_ROUND_UP(rk3328_bus_get_clk(priv, in rk3328_bus_set_clk()
637 assert(src_clk_div - 1 < 3); in rk3328_bus_set_clk()
640 (src_clk_div - 1) << HCLK_BUS_DIV_CON_SHIFT); in rk3328_bus_set_clk()
643 src_clk_div = DIV_ROUND_UP(rk3328_bus_get_clk(priv, in rk3328_bus_set_clk()
646 assert(src_clk_div - 1 < 7); in rk3328_bus_set_clk()
649 (src_clk_div - 1) << PCLK_BUS_DIV_CON_SHIFT); in rk3328_bus_set_clk()
690 int src_clk_div; in rk3328_peri_set_clk() local
698 src_clk_div = DIV_ROUND_UP(priv->cpll_hz, hz); in rk3328_peri_set_clk()
699 assert(src_clk_div - 1 < 31); in rk3328_peri_set_clk()
700 if (src_clk_div > 32) in rk3328_peri_set_clk()
701 src_clk_div = 32; in rk3328_peri_set_clk()
705 (src_clk_div - 1) << ACLK_PERI_DIV_CON_SHIFT); in rk3328_peri_set_clk()
708 src_clk_div = DIV_ROUND_UP(rk3328_peri_get_clk(priv, in rk3328_peri_set_clk()
711 assert(src_clk_div - 1 < 3); in rk3328_peri_set_clk()
714 (src_clk_div - 1) << HCLK_PERI_DIV_CON_SHIFT); in rk3328_peri_set_clk()
717 src_clk_div = DIV_ROUND_UP(rk3328_peri_get_clk(priv, in rk3328_peri_set_clk()
720 assert(src_clk_div - 1 < 7); in rk3328_peri_set_clk()
723 (src_clk_div - 1) << PCLK_PERI_DIV_CON_SHIFT); in rk3328_peri_set_clk()
756 int src_clk_div; in rk3328_crypto_set_clk() local
758 src_clk_div = DIV_ROUND_UP(priv->gpll_hz, hz); in rk3328_crypto_set_clk()
759 assert(src_clk_div - 1 <= 127); in rk3328_crypto_set_clk()
770 (src_clk_div - 1) << CRYPTO_DIV_SHIFT); in rk3328_crypto_set_clk()