25 #define DIV_TO_RATE(input_rate, div)    ((input_rate) / ((div) + 1))  macro
194 	return DIV_TO_RATE(priv->gpll_hz, div);  in rk3328_i2c_get_clk()
240 	return DIV_TO_RATE(priv->gpll_hz, src_clk_div);  in rk3328_i2c_set_clk()
276 		return DIV_TO_RATE(pll_rate, div);  in rk3328_gmac2io_set_clk()
300 	return DIV_TO_RATE(pll_rate, div);  in rk3328_gmac2phy_src_set_clk()
339 		return DIV_TO_RATE(OSC_HZ, div) / 2;  in rk3328_mmc_get_clk()
341 		return DIV_TO_RATE(priv->gpll_hz, div) / 2;  in rk3328_mmc_get_clk()
397 	return DIV_TO_RATE(p_rate, div);  in rk3328_spi_get_clk()
410 	return DIV_TO_RATE(priv->gpll_hz, div);  in rk3328_spi_set_clk()
422 	return DIV_TO_RATE(priv->gpll_hz, div);  in rk3328_pwm_get_clk()
435 	return DIV_TO_RATE(priv->gpll_hz, div);  in rk3328_pwm_set_clk()
447 	return DIV_TO_RATE(OSC_HZ, div);  in rk3328_saradc_get_clk()
474 	return DIV_TO_RATE(OSC_HZ, div);  in rk3328_tsadc_get_clk()
520 	return DIV_TO_RATE(parent, div);  in rk3328_vop_get_clk()
609 	return DIV_TO_RATE(parent, div);  in rk3328_bus_get_clk()
683 	return DIV_TO_RATE(parent, div);  in rk3328_peri_get_clk()
749 	return DIV_TO_RATE(parent, div);  in rk3328_crypto_get_clk()