137 static ulong rk3308_armclk_set_clk(struct rk3308_clk_priv *priv, ulong hz)  in rk3308_armclk_set_clk()  argument
143 	rate = rockchip_get_cpu_settings(rk3308_cpu_rates, hz);  in rk3308_armclk_set_clk()
156 	if (old_rate > hz) {  in rk3308_armclk_set_clk()
158 					  priv->cru, APLL, hz))  in rk3308_armclk_set_clk()
167 	} else if (old_rate < hz) {  in rk3308_armclk_set_clk()
176 					  priv->cru, APLL, hz))  in rk3308_armclk_set_clk()
226 static ulong rk3308_i2c_set_clk(struct clk *clk, uint hz)  in rk3308_i2c_set_clk()  argument
232 	src_clk_div = DIV_ROUND_UP(priv->dpll_hz, hz);  in rk3308_i2c_set_clk()
260 static ulong rk3308_mac_set_clk(struct clk *clk, uint hz)  in rk3308_mac_set_clk()  argument
279 	if (!hz)  in rk3308_mac_set_clk()
280 		hz = 50000000;  in rk3308_mac_set_clk()
282 	div = DIV_ROUND_UP(pll_rate, hz) - 1;  in rk3308_mac_set_clk()
290 static int rk3308_mac_set_speed_clk(struct clk *clk, uint hz)  in rk3308_mac_set_speed_clk()  argument
295 	if (hz != 2500000 && hz != 25000000) {  in rk3308_mac_set_speed_clk()
296 		debug("Unsupported mac speed:%d\n", hz);  in rk3308_mac_set_speed_clk()
301 		     ((hz == 2500000) ? 0 : 1) << MAC_CLK_SPEED_SEL_SHIFT);  in rk3308_mac_set_speed_clk()
392 static ulong rk3308_saradc_set_clk(struct clk *clk, uint hz)  in rk3308_saradc_set_clk()  argument
398 	src_clk_div = DIV_ROUND_UP(OSC_HZ, hz);  in rk3308_saradc_set_clk()
420 static ulong rk3308_tsadc_set_clk(struct clk *clk, uint hz)  in rk3308_tsadc_set_clk()  argument
426 	src_clk_div = DIV_ROUND_UP(OSC_HZ, hz);  in rk3308_tsadc_set_clk()
463 static ulong rk3308_spi_set_clk(struct clk *clk, uint hz)  in rk3308_spi_set_clk()  argument
469 	src_clk_div = DIV_ROUND_UP(priv->dpll_hz, hz);  in rk3308_spi_set_clk()
507 static ulong rk3308_pwm_set_clk(struct clk *clk, uint hz)  in rk3308_pwm_set_clk()  argument
513 	src_clk_div = DIV_ROUND_UP(priv->dpll_hz, hz);  in rk3308_pwm_set_clk()
560 static ulong rk3308_vop_set_clk(struct clk *clk, ulong hz)  in rk3308_vop_set_clk()  argument
583 		div = DIV_ROUND_UP(pll_rate, hz);  in rk3308_vop_set_clk()
587 		if (abs(hz - now) < abs(hz - best_rate)) {  in rk3308_vop_set_clk()
596 	if (best_rate != hz && hz == OSC_HZ) {  in rk3308_vop_set_clk()
642 				ulong hz)  in rk3308_bus_set_clk()  argument
647 	src_clk_div = DIV_ROUND_UP(priv->dpll_hz, hz);  in rk3308_bus_set_clk()
705 				 ulong hz)  in rk3308_peri_set_clk()  argument
710 	src_clk_div = DIV_ROUND_UP(priv->dpll_hz, hz);  in rk3308_peri_set_clk()
764 				  ulong hz)  in rk3308_audio_set_clk()  argument
769 	src_clk_div = DIV_ROUND_UP(priv->vpll0_hz, hz);  in rk3308_audio_set_clk()
821 				   ulong hz)  in rk3308_crypto_set_clk()  argument
826 	src_clk_div = DIV_ROUND_UP(priv->vpll0_hz, hz);  in rk3308_crypto_set_clk()
875 				   ulong hz)  in rk3308_rtc32k_set_clk()  argument
880 	rational_best_approximation(hz, OSC_HZ,  in rk3308_rtc32k_set_clk()
913 static ulong rk3308_sclk_sfc_set_clk(struct rk3308_clk_priv *priv, uint hz)  in rk3308_sclk_sfc_set_clk()  argument
918 	src_clk_div = DIV_ROUND_UP(priv->vpll0_hz, hz);  in rk3308_sclk_sfc_set_clk()