Lines Matching refs:DIV_ROUND_UP
185 src_clk_div = DIV_ROUND_UP(priv->gpll_hz / 2, freq); in rockchip_mmc_set_clk()
188 src_clk_div = DIV_ROUND_UP(OSC_HZ / 2, freq); in rockchip_mmc_set_clk()
266 src_clk_div = DIV_ROUND_UP(priv->gpll_hz, hz); in rk3128_peri_set_clk()
279 src_clk_div = DIV_ROUND_UP(rk3128_peri_get_clk(priv, in rk3128_peri_set_clk()
288 src_clk_div = DIV_ROUND_UP(rk3128_peri_get_clk(priv, in rk3128_peri_set_clk()
341 src_clk_div = DIV_ROUND_UP(priv->gpll_hz, hz); in rk3128_bus_set_clk()
349 src_clk_div = DIV_ROUND_UP(rk3128_bus_get_clk(priv, in rk3128_bus_set_clk()
358 src_clk_div = DIV_ROUND_UP(rk3128_bus_get_clk(priv, in rk3128_bus_set_clk()
391 div = DIV_ROUND_UP(priv->gpll_hz, hz); in rk3128_spi_set_clk()
418 src_clk_div = DIV_ROUND_UP(OSC_HZ, hz) - 1; in rk3128_saradc_set_clk()
454 src_clk_div = DIV_ROUND_UP(RK3128_LCDC_PLL_LIMIT, hz); in rk3128_vop_set_clk()
518 src_clk_div = DIV_ROUND_UP(p_rate, hz) - 1; in rk3128_crypto_set_rate()