596 	ulong ret = 0;  in rk3128_clk_set_rate()  local
602 		ret = rockchip_pll_set_rate(&rk3128_pll_clks[clk->id - 1],  in rk3128_clk_set_rate()
605 		ret = rockchip_pll_set_rate(&rk3128_pll_clks[GPLL],  in rk3128_clk_set_rate()
611 			ret = rk3128_armclk_set_clk(priv, rate);  in rk3128_clk_set_rate()
623 		ret = rockchip_mmc_set_clk(priv, clk->id, rate);  in rk3128_clk_set_rate()
633 		ret = rk3128_peri_set_clk(priv, clk->id, rate);  in rk3128_clk_set_rate()
638 		ret = rk3128_bus_set_clk(priv, clk->id, rate);  in rk3128_clk_set_rate()
641 		ret = rk3128_spi_set_clk(priv, rate);  in rk3128_clk_set_rate()
645 		ret = rk3128_saradc_set_clk(priv, rate);  in rk3128_clk_set_rate()
651 		ret = rk3128_vop_set_clk(priv, clk->id, rate);  in rk3128_clk_set_rate()
654 		ret = rk3128_crypto_set_rate(priv, rate);  in rk3128_clk_set_rate()
660 	return ret;  in rk3128_clk_set_rate()
758 	int ret;  in rk3128_clk_get_phase()  local
765 		ret = rk3128_mmc_get_phase(clk);  in rk3128_clk_get_phase()
771 	return ret;  in rk3128_clk_get_phase()
776 	int ret;  in rk3128_clk_set_phase()  local
783 		ret = rk3128_mmc_set_phase(clk, degrees);  in rk3128_clk_set_phase()
789 	return ret;  in rk3128_clk_set_phase()
861 	int ret;  in rk3128_clk_bind()  local
867 	ret = device_bind_driver(dev, "rockchip_sysreset", "sysreset",  in rk3128_clk_bind()
869 	if (ret) {  in rk3128_clk_bind()
870 		debug("Warning: No sysreset driver: ret=%d\n", ret);  in rk3128_clk_bind()
880 	ret = device_bind_driver_to_node(dev, "rockchip_reset", "reset",  in rk3128_clk_bind()
882 	if (ret) {  in rk3128_clk_bind()
883 		debug("Warning: No rockchip reset driver: ret=%d\n", ret);  in rk3128_clk_bind()
927 	int i, ret;  in soc_clk_dump()  local
929 	ret = uclass_get_device_by_driver(UCLASS_CLK,  in soc_clk_dump()
932 	if (ret) {  in soc_clk_dump()
934 		return ret;  in soc_clk_dump()
949 				ret = clk_request(cru_dev, &clk);  in soc_clk_dump()
950 			if (ret < 0)  in soc_clk_dump()
951 				return ret;  in soc_clk_dump()