Lines Matching refs:clk_general_rate

242 static ulong rockchip_mmc_get_clk(struct rk3036_cru *cru, uint clk_general_rate,  in rockchip_mmc_get_clk()  argument
274 src_rate = mux == EMMC_SEL_24M ? OSC_HZ : clk_general_rate; in rockchip_mmc_get_clk()
278 static ulong rockchip_mmc_set_clk(struct rk3036_cru *cru, uint clk_general_rate, in rockchip_mmc_set_clk() argument
284 debug("%s: clk_general_rate=%u\n", __func__, clk_general_rate); in rockchip_mmc_set_clk()
287 src_clk_div = DIV_ROUND_UP(clk_general_rate / 2, freq); in rockchip_mmc_set_clk()
333 return rockchip_mmc_get_clk(cru, clk_general_rate, periph); in rockchip_mmc_set_clk()
336 static ulong rk3036_spi_get_clk(struct rk3036_cru *cru, uint clk_general_rate) in rk3036_spi_get_clk() argument
343 return DIV_TO_RATE(clk_general_rate, div); in rk3036_spi_get_clk()
347 uint clk_general_rate, in rk3036_spi_set_clk() argument
352 div = DIV_ROUND_UP(clk_general_rate, hz); in rk3036_spi_set_clk()
358 return rk3036_spi_get_clk(cru, clk_general_rate); in rk3036_spi_set_clk()
362 uint clk_general_rate) in rockchip_dclk_lcdc_get_clk() argument
370 parent = clk_general_rate; in rockchip_dclk_lcdc_get_clk()
378 uint clk_general_rate, uint freq) in rockchip_dclk_lcdc_set_clk() argument
382 src_clk_div = DIV_ROUND_UP(clk_general_rate, freq); in rockchip_dclk_lcdc_set_clk()
390 return rockchip_dclk_lcdc_get_clk(cru, clk_general_rate); in rockchip_dclk_lcdc_set_clk()
394 uint clk_general_rate) in rockchip_aclk_lcdc_get_clk() argument
402 parent = clk_general_rate; in rockchip_aclk_lcdc_get_clk()
410 uint clk_general_rate, uint freq) in rockchip_aclk_lcdc_set_clk() argument
414 src_clk_div = DIV_ROUND_UP(clk_general_rate, freq); in rockchip_aclk_lcdc_set_clk()
422 return rockchip_aclk_lcdc_get_clk(cru, clk_general_rate); in rockchip_aclk_lcdc_set_clk()
426 uint clk_general_rate) in rk3036_peri_get_clk() argument
435 parent = clk_general_rate; in rk3036_peri_get_clk()
440 parent = rk3036_peri_get_clk(priv, ACLK_PERI, clk_general_rate); in rk3036_peri_get_clk()
451 ulong clk_id, uint clk_general_rate, in rk3036_peri_set_clk() argument
459 src_clk_div = DIV_ROUND_UP(clk_general_rate, hz); in rk3036_peri_set_clk()
469 clk_general_rate), in rk3036_peri_set_clk()
481 return rk3036_peri_get_clk(priv, clk_id, clk_general_rate); in rk3036_peri_set_clk()