Lines Matching refs:DIV_TO_RATE
30 #define DIV_TO_RATE(input_rate, div) ((input_rate) / ((div) + 1)) macro
130 return DIV_TO_RATE(priv->gpll_hz, div); in rk1808_i2c_get_clk()
216 return DIV_TO_RATE(OSC_HZ, div) / 2; in rk1808_mmc_get_clk()
218 return DIV_TO_RATE(priv->gpll_hz, div) / 2; in rk1808_mmc_get_clk()
276 return DIV_TO_RATE(priv->gpll_hz, div); in rk1808_sfc_get_clk()
302 return DIV_TO_RATE(OSC_HZ, div); in rk1808_saradc_get_clk()
344 return DIV_TO_RATE(priv->gpll_hz, div); in rk1808_pwm_get_clk()
391 return DIV_TO_RATE(OSC_HZ, div); in rk1808_tsadc_get_clk()
432 return DIV_TO_RATE(priv->gpll_hz, div); in rk1808_spi_get_clk()
513 return DIV_TO_RATE(parent, div); in rk1808_vop_get_clk()
621 return DIV_TO_RATE(pll_rate, div); in rk1808_mac_set_clk()
675 return DIV_TO_RATE(parent, div); in rk1808_crypto_get_clk()
739 return DIV_TO_RATE(parent, div); in rk1808_bus_get_clk()
807 return DIV_TO_RATE(parent, div); in rk1808_peri_get_clk()