330 	int src_clk_div;  in px30_i2c_set_clk()  local
332 	src_clk_div = DIV_ROUND_UP(priv->gpll_hz, hz);  in px30_i2c_set_clk()
333 	assert(src_clk_div - 1 <= 127);  in px30_i2c_set_clk()
340 			     (src_clk_div - 1) << CLK_I2C0_DIV_CON_SHIFT |  in px30_i2c_set_clk()
347 			     (src_clk_div - 1) << CLK_I2C1_DIV_CON_SHIFT |  in px30_i2c_set_clk()
354 			     (src_clk_div - 1) << CLK_I2C2_DIV_CON_SHIFT |  in px30_i2c_set_clk()
361 			     (src_clk_div - 1) << CLK_I2C3_DIV_CON_SHIFT |  in px30_i2c_set_clk()
534 	int src_clk_div;  in px30_nandc_set_clk()  local
538 	src_clk_div = DIV_ROUND_UP(priv->gpll_hz, set_rate);  in px30_nandc_set_clk()
539 	assert(src_clk_div - 1 <= 31);  in px30_nandc_set_clk()
546 		     (src_clk_div - 1) << NANDC_DIV_SHIFT);  in px30_nandc_set_clk()
585 	int src_clk_div;  in px30_mmc_set_clk()  local
603 	src_clk_div = DIV_ROUND_UP(priv->gpll_hz / 2, set_rate);  in px30_mmc_set_clk()
605 	if (src_clk_div > 127) {  in px30_mmc_set_clk()
607 		src_clk_div = DIV_ROUND_UP(OSC_HZ / 2, set_rate);  in px30_mmc_set_clk()
611 			     (src_clk_div - 1) << EMMC_DIV_SHIFT);  in px30_mmc_set_clk()
616 			     (src_clk_div - 1) << EMMC_DIV_SHIFT);  in px30_mmc_set_clk()
639 	int src_clk_div;  in px30_sfc_set_clk()  local
641 	src_clk_div = DIV_ROUND_UP(priv->gpll_hz, set_rate);  in px30_sfc_set_clk()
645 		     (src_clk_div - 1) << SFC_DIV_CON_SHIFT);  in px30_sfc_set_clk()
675 	int src_clk_div;  in px30_pwm_set_clk()  local
677 	src_clk_div = DIV_ROUND_UP(priv->gpll_hz, hz);  in px30_pwm_set_clk()
678 	assert(src_clk_div - 1 <= 127);  in px30_pwm_set_clk()
685 			     (src_clk_div - 1) << CLK_PWM0_DIV_CON_SHIFT |  in px30_pwm_set_clk()
692 			     (src_clk_div - 1) << CLK_PWM1_DIV_CON_SHIFT |  in px30_pwm_set_clk()
717 	int src_clk_div;  in px30_saradc_set_clk()  local
719 	src_clk_div = DIV_ROUND_UP(OSC_HZ, hz);  in px30_saradc_set_clk()
720 	assert(src_clk_div - 1 <= 2047);  in px30_saradc_set_clk()
724 		     (src_clk_div - 1) << CLK_SARADC_DIV_CON_SHIFT);  in px30_saradc_set_clk()
743 	int src_clk_div;  in px30_tsadc_set_clk()  local
745 	src_clk_div = DIV_ROUND_UP(OSC_HZ, hz);  in px30_tsadc_set_clk()
746 	assert(src_clk_div - 1 <= 2047);  in px30_tsadc_set_clk()
750 		     (src_clk_div - 1) << CLK_SARADC_DIV_CON_SHIFT);  in px30_tsadc_set_clk()
780 	int src_clk_div;  in px30_spi_set_clk()  local
782 	src_clk_div = DIV_ROUND_UP(priv->gpll_hz, hz);  in px30_spi_set_clk()
783 	assert(src_clk_div - 1 <= 127);  in px30_spi_set_clk()
790 			     (src_clk_div - 1) << CLK_SPI0_DIV_CON_SHIFT |  in px30_spi_set_clk()
797 			     (src_clk_div - 1) << CLK_SPI1_DIV_CON_SHIFT |  in px30_spi_set_clk()
841 	int src_clk_div;  in px30_vop_set_clk()  local
846 		src_clk_div = DIV_ROUND_UP(priv->gpll_hz, hz);  in px30_vop_set_clk()
847 		assert(src_clk_div - 1 <= 31);  in px30_vop_set_clk()
851 			     (src_clk_div - 1) << ACLK_VO_DIV_SHIFT);  in px30_vop_set_clk()
855 			src_clk_div = DIV_ROUND_UP(PX30_VOP_PLL_LIMIT, hz);  in px30_vop_set_clk()
856 			if (src_clk_div % 2)  in px30_vop_set_clk()
857 				src_clk_div = src_clk_div - 1;  in px30_vop_set_clk()
859 			src_clk_div = 1;  in px30_vop_set_clk()
861 		assert(src_clk_div - 1 <= 255);  in px30_vop_set_clk()
862 		rkclk_set_pll(&cru->pll[CPLL], &cru->mode, CPLL, hz * src_clk_div);  in px30_vop_set_clk()
868 			     (src_clk_div - 1) << DCLK_VOPB_DIV_SHIFT);  in px30_vop_set_clk()
873 			src_clk_div = npll_hz / hz;  in px30_vop_set_clk()
874 			assert(src_clk_div - 1 <= 255);  in px30_vop_set_clk()
877 				src_clk_div = DIV_ROUND_UP(PX30_VOP_PLL_LIMIT, hz);  in px30_vop_set_clk()
878 				if (src_clk_div % 2)  in px30_vop_set_clk()
879 					src_clk_div = src_clk_div - 1;  in px30_vop_set_clk()
881 				src_clk_div = 1;  in px30_vop_set_clk()
883 			assert(src_clk_div - 1 <= 255);  in px30_vop_set_clk()
884 			rkclk_set_pll(&cru->pll[NPLL], &cru->mode, NPLL, hz * src_clk_div);  in px30_vop_set_clk()
891 			     (src_clk_div - 1) << DCLK_VOPL_DIV_SHIFT);  in px30_vop_set_clk()
934 	int src_clk_div;  in px30_bus_set_clk()  local
942 		src_clk_div = DIV_ROUND_UP(priv->gpll_hz, hz);  in px30_bus_set_clk()
943 		assert(src_clk_div - 1 <= 31);  in px30_bus_set_clk()
947 			     (src_clk_div - 1) << BUS_ACLK_DIV_SHIFT);  in px30_bus_set_clk()
950 		src_clk_div = DIV_ROUND_UP(priv->gpll_hz, hz);  in px30_bus_set_clk()
951 		assert(src_clk_div - 1 <= 31);  in px30_bus_set_clk()
955 			     (src_clk_div - 1) << BUS_HCLK_DIV_SHIFT);  in px30_bus_set_clk()
958 		src_clk_div =  in px30_bus_set_clk()
960 		assert(src_clk_div - 1 <= 3);  in px30_bus_set_clk()
963 			     (src_clk_div - 1) << BUS_PCLK_DIV_SHIFT);  in px30_bus_set_clk()
1000 	int src_clk_div;  in px30_peri_set_clk()  local
1002 	src_clk_div = DIV_ROUND_UP(priv->gpll_hz, hz);  in px30_peri_set_clk()
1003 	assert(src_clk_div - 1 <= 31);  in px30_peri_set_clk()
1014 			     (src_clk_div - 1) << PERI_ACLK_DIV_SHIFT);  in px30_peri_set_clk()
1020 			     (src_clk_div - 1) << PERI_HCLK_DIV_SHIFT);  in px30_peri_set_clk()
1134 	int src_clk_div;  in px30_crypto_set_clk()  local
1136 	src_clk_div = DIV_ROUND_UP(priv->gpll_hz, hz);  in px30_crypto_set_clk()
1137 	assert(src_clk_div - 1 <= 31);  in px30_crypto_set_clk()
1148 			     (src_clk_div - 1) << CRYPTO_DIV_SHIFT);  in px30_crypto_set_clk()
1154 			     (src_clk_div - 1) << CRYPTO_APK_DIV_SHIFT);  in px30_crypto_set_clk()
1750 	int src_clk_div;  in px30_pclk_pmu_set_pmuclk()  local
1752 	src_clk_div = DIV_ROUND_UP(priv->gpll_hz, hz);  in px30_pclk_pmu_set_pmuclk()
1753 	assert(src_clk_div - 1 <= 31);  in px30_pclk_pmu_set_pmuclk()
1757 		     (src_clk_div - 1) << CLK_PMU_PCLK_DIV_SHIFT);  in px30_pclk_pmu_set_pmuclk()