1214 	int ret;  in px30_clk_get_gpll_rate()  local
1216 	ret = uclass_get_device_by_driver(UCLASS_CLK,  in px30_clk_get_gpll_rate()
1219 	if (ret) {  in px30_clk_get_gpll_rate()
1221 		return ret;  in px30_clk_get_gpll_rate()
1387 	ulong ret = 0;  in px30_clk_set_rate()  local
1397 		ret = px30_clk_set_pll_rate(priv, NPLL, rate);  in px30_clk_set_rate()
1408 		ret = px30_mmc_set_clk(priv, clk->id, rate);  in px30_clk_set_rate()
1411 		ret = px30_sfc_set_clk(priv, clk->id, rate);  in px30_clk_set_rate()
1417 		ret = px30_i2c_set_clk(priv, clk->id, rate);  in px30_clk_set_rate()
1420 		ret = px30_i2s_set_clk(priv, clk->id, rate);  in px30_clk_set_rate()
1423 		ret = px30_i2s1_mclk_set_clk(priv, clk->id, rate);  in px30_clk_set_rate()
1427 		ret = px30_pwm_set_clk(priv, clk->id, rate);  in px30_clk_set_rate()
1430 		ret = px30_saradc_set_clk(priv, rate);  in px30_clk_set_rate()
1433 		ret = px30_tsadc_set_clk(priv, rate);  in px30_clk_set_rate()
1437 		ret = px30_spi_set_clk(priv, clk->id, rate);  in px30_clk_set_rate()
1443 		ret = px30_vop_set_clk(priv, clk->id, rate);  in px30_clk_set_rate()
1448 		ret = px30_bus_set_clk(priv, clk->id, rate);  in px30_clk_set_rate()
1452 		ret = px30_peri_set_clk(priv, clk->id, rate);  in px30_clk_set_rate()
1456 		ret = px30_otp_set_clk(priv, clk->id, rate);  in px30_clk_set_rate()
1460 		ret = px30_crypto_set_clk(priv, clk->id, rate);  in px30_clk_set_rate()
1465 		ret = px30_mac_set_clk(clk, rate);  in px30_clk_set_rate()
1468 		ret = px30_mac_set_speed_clk(clk, rate);  in px30_clk_set_rate()
1475 	return ret;  in px30_clk_set_rate()
1569 	int ret;  in px30_clk_get_phase()  local
1575 		ret = rockchip_mmc_get_phase(clk);  in px30_clk_get_phase()
1581 	return ret;  in px30_clk_get_phase()
1586 	int ret;  in px30_clk_set_phase()  local
1592 		ret = rockchip_mmc_set_phase(clk, degrees);  in px30_clk_set_phase()
1598 	return ret;  in px30_clk_set_phase()
1643 	int ret;  in px30_clk_probe()  local
1651 		ret = px30_armclk_set_clk(priv, APLL_HZ);  in px30_clk_probe()
1652 		if (ret < 0)  in px30_clk_probe()
1658 	ret = clk_set_defaults(dev);  in px30_clk_probe()
1659 	if (ret)  in px30_clk_probe()
1660 		debug("%s clk_set_defaults failed %d\n", __func__, ret);  in px30_clk_probe()
1665 		ret = px30_clk_get_gpll_rate(&priv->gpll_hz);  in px30_clk_probe()
1666 		if (ret) {  in px30_clk_probe()
1668 			return ret;  in px30_clk_probe()
1686 	int ret;  in px30_clk_bind()  local
1692 	ret = device_bind_driver(dev, "rockchip_sysreset", "sysreset",  in px30_clk_bind()
1694 	if (ret) {  in px30_clk_bind()
1695 		debug("Warning: No sysreset driver: ret=%d\n", ret);  in px30_clk_bind()
1705 	ret = device_bind_driver_to_node(dev, "rockchip_reset", "reset",  in px30_clk_bind()
1707 	if (ret) {  in px30_clk_bind()
1708 		debug("Warning: No rockchip reset driver: ret=%d\n", ret);  in px30_clk_bind()
1778 	int ret;  in px30_gpll_set_pmuclk()  local
1780 	ret = uclass_get_device_by_name(UCLASS_CLK,  in px30_gpll_set_pmuclk()
1783 	if (ret) {  in px30_gpll_set_pmuclk()
1785 		return ret;  in px30_gpll_set_pmuclk()
1870 	ulong ret = 0;  in px30_pmuclk_set_rate()  local
1875 		ret = px30_gpll_set_pmuclk(priv, rate);  in px30_pmuclk_set_rate()
1878 		ret = px30_pclk_pmu_set_pmuclk(priv, rate);  in px30_pmuclk_set_rate()
1884 	return ret;  in px30_pmuclk_set_rate()
1897 	int ret;  in px30_clk_init()  local
1899 	ret = uclass_get_device_by_name(UCLASS_CLK,  in px30_clk_init()
1901 	if (ret) {  in px30_clk_init()
1913 		ret = px30_gpll_set_pmuclk(priv, GPLL_HZ);  in px30_clk_init()
1914 		if (ret < 0)  in px30_clk_init()
1922 		ret = px30_clk_set_pll_rate(cru_priv, NPLL, NPLL_HZ);  in px30_clk_init()
1923 		if (ret < 0)  in px30_clk_init()
1941 	int ret;  in px30_pmuclk_probe()  local
1946 	ret = clk_set_defaults(dev);  in px30_pmuclk_probe()
1947 	if (ret)  in px30_pmuclk_probe()
1948 		debug("%s clk_set_defaults failed %d\n", __func__, ret);  in px30_pmuclk_probe()
1991 	int i, ret;  in soc_clk_dump()  local
1993 	ret = uclass_get_device_by_driver(UCLASS_CLK,  in soc_clk_dump()
1996 	if (ret) {  in soc_clk_dump()
1998 		return ret;  in soc_clk_dump()
2001 	ret = uclass_get_device_by_driver(UCLASS_CLK,  in soc_clk_dump()
2004 	if (ret) {  in soc_clk_dump()
2006 		return ret;  in soc_clk_dump()
2021 				ret = clk_request(cru_dev, &clk);  in soc_clk_dump()
2023 				ret = clk_request(pmucru_dev, &clk);  in soc_clk_dump()
2024 			if (ret < 0)  in soc_clk_dump()
2025 				return ret;  in soc_clk_dump()