Lines Matching refs:msr_write
82 msr_write(MSR_IA32_FEATURE_CONTROL, msr); in enable_vmx()
213 msr_write(MSR_PKG_POWER_LIMIT, limit); in set_power_limits()
220 msr_write(MSR_TURBO_ACTIVATION_RATIO, limit); in set_power_limits()
236 msr_write(MSR_PMG_CST_CONFIG_CTL, msr); in configure_c_states()
242 msr_write(MSR_PMG_IO_CAPTURE_ADR, msr); in configure_c_states()
246 msr_write(MSR_MISC_PWR_MGMT, msr); in configure_c_states()
252 msr_write(MSR_POWER_CTL, msr); in configure_c_states()
257 msr_write(MSR_PKGC3_IRTL, msr); in configure_c_states()
262 msr_write(MSR_PKGC6_IRTL, msr); in configure_c_states()
267 msr_write(MSR_PKGC7_IRTL, msr); in configure_c_states()
273 msr_write(MSR_PP0_CURRENT_CONFIG, msr); in configure_c_states()
283 msr_write(MSR_PP1_CURRENT_CONFIG, msr); in configure_c_states()
300 msr_write(MSR_TEMPERATURE_TARGET, msr); in configure_thermal_target()
314 msr_write(IA32_MISC_ENABLE, msr); in configure_misc()
319 msr_write(IA32_THERM_INTERRUPT, msr); in configure_misc()
324 msr_write(IA32_PACKAGE_THERM_INTERRUPT, msr); in configure_misc()
333 msr_write(MSR_PIC_MSG_CONTROL, msr); in enable_lapic_tpr()
346 msr_write(IA32_PLATFORM_DCA_CAP, msr); in configure_dca_cap()
366 msr_write(MSR_IA32_PERF_CTL, perf_ctl); in set_max_ratio()
380 msr_write(IA32_ENERGY_PERFORMANCE_BIAS, msr); in set_energy_perf_bias()
394 msr_write(IA32_MC0_STATUS + (i * 4), msr); in configure_mca()