Lines Matching refs:mctl_ctl
7 struct sunxi_mctl_ctl_reg * const mctl_ctl = in mctl_set_timing_params() local
48 writel(0x263, &mctl_ctl->mr[0]); in mctl_set_timing_params()
49 writel(0x4, &mctl_ctl->mr[1]); in mctl_set_timing_params()
50 writel(0x0, &mctl_ctl->mr[2]); in mctl_set_timing_params()
51 writel(0x0, &mctl_ctl->mr[3]); in mctl_set_timing_params()
56 &mctl_ctl->dramtmg[0]); in mctl_set_timing_params()
58 &mctl_ctl->dramtmg[1]); in mctl_set_timing_params()
61 &mctl_ctl->dramtmg[2]); in mctl_set_timing_params()
63 &mctl_ctl->dramtmg[3]); in mctl_set_timing_params()
65 DRAMTMG4_TRP(trp), &mctl_ctl->dramtmg[4]); in mctl_set_timing_params()
68 &mctl_ctl->dramtmg[5]); in mctl_set_timing_params()
71 clrsetbits_le32(&mctl_ctl->dramtmg[8], (0xff << 8) | (0xff << 0), in mctl_set_timing_params()
76 (wr_latency << 0), &mctl_ctl->pitmg[0]); in mctl_set_timing_params()
79 writel(PTR3_TDINIT0(tdinit0) | PTR3_TDINIT1(tdinit1), &mctl_ctl->ptr[3]); in mctl_set_timing_params()
80 writel(PTR4_TDINIT2(tdinit2) | PTR4_TDINIT3(tdinit3), &mctl_ctl->ptr[4]); in mctl_set_timing_params()
83 writel(RFSHTMG_TREFI(trefi) | RFSHTMG_TRFC(trfc), &mctl_ctl->rfshtmg); in mctl_set_timing_params()