20 #define printep(fmt, ...) \  macro
150 	printep("BAR0: 0x%x\n", RKEP_BAR0_ADDR);  in pcie_inbound_config()
164 	printep("BAR2: 0x%x%x\n", 0, RKEP_BAR2_ADDR);  in pcie_inbound_config()
317 	printep("Link ready! Waiting RC to download Firmware:\n");  in pcie_wait_for_fw()
318 	printep("Download uboot.img  to BAR2+0\n");  in pcie_wait_for_fw()
319 	printep("Download boot.img   to BAR2+0x400000\n");  in pcie_wait_for_fw()
320 	printep("Send CMD_LOADER_RUN to BAR0+0x400\n");  in pcie_wait_for_fw()
329 			printep("Waiting for FW, CMD: %x\n", val);  in pcie_wait_for_fw()
334 	printep("Firmware Download complete!\n");  in pcie_wait_for_fw()
342 		printep("RKEP: No ATAGS data found, create new!\n");  in pcie_update_atags()
422 	printep("Fst Reset\n");  in pcie_first_reset()
446 	printep("PHY Mode 0x%x\n", readl(RK3588_PCIE3PHY_GRF_CMN_CON0) & 7);  in pcie_cru_init()
500 			printep("RKEP: GRF:904=%x, a04=%x...\n", phy0_mplla, phy1_mplla);  in pcie_cru_init()
517 		printep("lock fail\n");  in pcie_cru_init()
568 	printep("Fst Reset\n");  in pcie_first_reset()
617 	printep("RKEP: sram initial\n");  in pcie_cru_init()
623 	printep("RKEP: sram init done\n");  in pcie_cru_init()
630 	printep("RKEP: snps pcie3phy FW update! size %ld\n", ARRAY_SIZE(phy_fw));  in pcie_cru_init()
645 			printep("RKEP: GRF:0x80=%x, 0x84=%x...\n", phy0_status0, phy0_status1);  in pcie_cru_init()
657 		printep("lock fail\n");  in pcie_cru_init()
678 	printep("RefClock in SRNS clock mode\n");  in pcie_ep_init()
680 	printep("RefClock in common clock_mode\n");  in pcie_ep_init()
721 		printep("Link is reset, int status misc=%x\n", val);  in pcie_ep_init()
729 	printep("init PCIe fast Link up\n");  in pcie_ep_init()
747 	printep("Link up %x\n", val);  in pcie_ep_init()
755 			printep("Link is reset, int status misc=%x\n", val);  in pcie_ep_init()
772 	printep("Done\n");  in pcie_ep_init()