Lines Matching refs:dpll_params

32 static const struct dpll_params mpu_dpll_params_800mhz[NUM_SYS_CLKS] = {
43 static const struct dpll_params mpu_dpll_params_1ghz[NUM_SYS_CLKS] = {
53 static const struct dpll_params
64 static const struct dpll_params
75 static const struct dpll_params
86 static const struct dpll_params per_dpll_params_768mhz[NUM_SYS_CLKS] = {
96 static const struct dpll_params per_dpll_params_768mhz_es2[NUM_SYS_CLKS] = {
106 static const struct dpll_params per_dpll_params_768mhz_dra7xx[NUM_SYS_CLKS] = {
116 static const struct dpll_params iva_dpll_params_2330mhz[NUM_SYS_CLKS] = {
126 static const struct dpll_params iva_dpll_params_2330mhz_dra7xx[NUM_SYS_CLKS] = {
138 static const struct dpll_params
152 static const struct dpll_params abe_dpll_params_32k_196608khz = {
158 static const struct dpll_params
169 static const struct dpll_params usb_dpll_params_1920mhz[NUM_SYS_CLKS] = {
179 static const struct dpll_params ddr_dpll_params_2664mhz[NUM_SYS_CLKS] = {
189 static const struct dpll_params ddr_dpll_params_2128mhz[NUM_SYS_CLKS] = {
199 static const struct dpll_params gmac_dpll_params_2000mhz[NUM_SYS_CLKS] = {