Lines Matching refs:i
90 int i; in dram_bank_mmu_setup() local
93 for (i = bd->bi_dram[bank].start >> MMU_SECTION_SHIFT; in dram_bank_mmu_setup()
94 i < (bd->bi_dram[bank].start >> MMU_SECTION_SHIFT) + in dram_bank_mmu_setup()
96 i++) { in dram_bank_mmu_setup()
98 set_section_dcache(i, DCACHE_WRITETHROUGH); in dram_bank_mmu_setup()
100 set_section_dcache(i, DCACHE_WRITEALLOC); in dram_bank_mmu_setup()
102 set_section_dcache(i, DCACHE_WRITEBACK); in dram_bank_mmu_setup()
110 int i, end; in mmu_setup() local
126 i = CONFIG_PERIPH_DEVICE_START_ADDR >> MMU_SECTION_SHIFT; in mmu_setup()
129 i = 0; in mmu_setup()
133 for (; i < end; i++) in mmu_setup()
134 set_section_dcache(i, DCACHE_OFF); in mmu_setup()
136 for (i = 0; i < CONFIG_NR_DRAM_BANKS; i++) { in mmu_setup()
137 dram_bank_mmu_setup(i); in mmu_setup()
142 for (i = 0; i < 4; i++) { in mmu_setup()
144 u64 tpt = gd->arch.tlb_addr + (4096 * i); in mmu_setup()
145 page_table[i] = tpt | TTB_PAGETABLE; in mmu_setup()