Lines Matching +full:- +full:xf
4 * Copyright (C) 2009-2010 Texas Instruments, Inc.
78 #define EMIF_REG_CL_MASK (0xf << 10)
116 #define EMIF_REG_T_RP_MASK (0xf << 25)
118 #define EMIF_REG_T_RCD_MASK (0xf << 21)
120 #define EMIF_REG_T_WR_MASK (0xf << 17)
132 #define EMIF_REG_T_RP_SHDW_MASK (0xf << 25)
134 #define EMIF_REG_T_RCD_SHDW_MASK (0xf << 21)
136 #define EMIF_REG_T_WR_SHDW_MASK (0xf << 17)
184 #define EMIF_REG_T_RAS_MAX_MASK (0xf << 0)
196 #define EMIF_REG_T_RAS_MAX_SHDW_MASK (0xf << 0)
204 #define EMIF_REG_NVM_T_RP_MASK (0xf << 20)
206 #define EMIF_REG_NVM_T_WRA_MASK (0xf << 16)
218 #define EMIF_REG_NVM_T_RP_SHDW_MASK (0xf << 20)
220 #define EMIF_REG_NVM_T_WRA_SHDW_MASK (0xf << 16)
230 #define EMIF_REG_PD_TIM_MASK (0xf << 12)
236 #define EMIF_REG_SR_TIM_MASK (0xf << 4)
238 #define EMIF_REG_CS_TIM_MASK (0xf << 0)
242 #define EMIF_REG_PD_TIM_SHDW_MASK (0xf << 12)
244 #define EMIF_REG_SR_TIM_SHDW_MASK (0xf << 4)
246 #define EMIF_REG_CS_TIM_SHDW_MASK (0xf << 0)
262 #define EMIF_REG_SYS_THRESH_MAX_MASK (0xf << 24)
264 #define EMIF_REG_MPU_THRESH_MAX_MASK (0xf << 20)
266 #define EMIF_REG_LL_THRESH_MAX_MASK (0xf << 16)
344 #define EMIF_REG_CNTR2_CFG_MASK (0xf << 16)
350 #define EMIF_REG_CNTR1_CFG_MASK (0xf << 0)
368 #define EMIF_REG_READ_IDLE_LEN_MASK (0xf << 16)
374 #define EMIF_REG_READ_IDLE_LEN_SHDW_MASK (0xf << 16)
466 #define EMIF_REG_READ_LATENCY_MASK (0xf << 0)
476 #define EMIF_REG_READ_LATENCY_SHDW_MASK (0xf << 0)
770 * calculations. So, as a trade-off keep denominator(and consequently
771 * numerator) within a limit sacrificing some accuracy - but not much
840 /* Interleaving policies at EMIF level- between banks and Chip Selects */
864 /* To be used when voltage is changed for DPS/DVFS - 1us */
868 * 50us - or maximum value will do
876 * due to smart-reflex.
889 /* Enable ZQ Calibration on exiting Self-refresh */
892 * ZQ Calibration simultaneously on both chip-selects:
917 #define REG_SR_TIM 0xF
918 #define REG_PD_TIM 0xF
960 * nWR : 3(default). EMIF does not do pre-charge.
979 #define TEMP_ALERT_POLL_INTERVAL_MS 360 /* for temp gradient - 5 C/s */
1077 #define MR8_DENSITY_MASK (0xF << 0x2)
1151 /* Details of the devices connected to each chip-select of an EMIF instance */
1212 return (readl(&emif->emif_mod_id_rev) & EMIF_REG_MAJOR_REVISION_MASK) in get_emif_rev()