Lines Matching refs:msr

28 	msr	csselr_el1, x12		/* select cache level */
100 	msr	csselr_el1, x0		/* restore csselr_el1 */
238 3:	msr	sctlr_el3, x1
240 2:	msr	sctlr_el2, x1
242 1:	msr	sctlr_el1, x1
253 3:	msr	ttbr0_el3, x0
255 2:	msr	ttbr0_el2, x0
257 1:	msr	ttbr0_el1, x0
262 3:	msr	sctlr_el3, x2
264 2:	msr	sctlr_el2, x2
266 1:	msr	sctlr_el1, x2