Lines Matching defs:ch
27 #define CRU_SFTRST_DDR_CTRL(ch, n) ((0x1 << (8 + 16 + (ch) * 4)) | \ argument
29 #define CRU_SFTRST_DDR_PHY(ch, n) ((0x1 << (9 + 16 + (ch) * 4)) | \ argument
136 static __pmusramfunc void phy_pctrl_reset(uint32_t ch) in phy_pctrl_reset()
146 static __pmusramfunc void set_cs_training_index(uint32_t ch, uint32_t rank) in set_cs_training_index()
156 static __pmusramfunc void select_per_cs_training_index(uint32_t ch, in select_per_cs_training_index()
164 static __pmusramfunc void override_write_leveling_value(uint32_t ch) in override_write_leveling_value()
184 static __pmusramfunc int data_training(uint32_t ch, in data_training()
434 struct rk3399_sdram_channel *ch = &sdram_params->ch[channel]; in set_ddrconfig() local
489 static __pmusramfunc void pctl_cfg(uint32_t ch, in pctl_cfg()
549 uint32_t ch, ch_count; in dram_switch_to_next_index() local
701 uint32_t ch, byte, i; in dmc_suspend() local
758 __pmusramfunc void phy_dll_bypass_set(uint32_t ch, uint32_t freq) in phy_dll_bypass_set()