19 struct dram_info dram_info;  variable
110 		if (dram_info.dram_type == DDRC_LPDDR4) {  in get_mr_values()
121 	uint32_t pstate_num = dram_info.num_fsp;  in save_rank_setting()
128 		dram_info.rank_setting[i][0] = mmio_read_32(DDRC_DRAMTMG2(0) + offset);  in save_rank_setting()
129 		if (dram_info.dram_type != DDRC_LPDDR4) {  in save_rank_setting()
130 			dram_info.rank_setting[i][1] = mmio_read_32(DDRC_DRAMTMG9(0) + offset);  in save_rank_setting()
133 		dram_info.rank_setting[i][2] = mmio_read_32(DDRC_RANKCTL(0) + offset);  in save_rank_setting()
137 	dram_info.rank_setting[0][2] = mmio_read_32(DDRC_RANKCTL(0));  in save_rank_setting()
224 	dram_info.dram_type = ddrc_mstr & DDR_TYPE_MASK;  in dram_info_init()
225 	dram_info.num_rank = ((ddrc_mstr >> 24) & ACTIVE_RANK_MASK) == 0x3 ?  in dram_info_init()
231 	dram_info.boot_fsp = current_fsp;  in dram_info_init()
232 	dram_info.current_fsp = current_fsp;  in dram_info_init()
238 	get_mr_values(dram_info.mr_table);  in dram_info_init()
240 	dram_info.timing_info = (struct dram_timing_info *)dram_timing_base;  in dram_info_init()
244 		if (!dram_info.timing_info->fsp_table[i]) {  in dram_info_init()
251 	dram_info.num_fsp = (i > MAX_FSP_NUM) ? MAX_FSP_NUM : i;  in dram_info_init()
262 	if (dram_info.timing_info->fsp_table[idx] < 666) {  in dram_info_init()
263 		dram_info.bypass_mode = true;  in dram_info_init()
265 		dram_info.bypass_mode = false;  in dram_info_init()
275 	if (dram_info.dram_type == DDRC_LPDDR4 && current_fsp != 0x0) {  in dram_info_init()
278 		lpddr4_swffc(&dram_info, dev_fsp, 0x0);  in dram_info_init()
283 		ddr4_swffc(&dram_info, 0x0);  in dram_info_init()
308 		 SMC_RET4(handle, dram_info.timing_info->fsp_table[0],  in dram_dvfs_get_freq_info()
311 		if (!dram_info.bypass_mode) {  in dram_dvfs_get_freq_info()
312 			SMC_RET4(handle, dram_info.timing_info->fsp_table[1],  in dram_dvfs_get_freq_info()
315 		SMC_RET4(handle, dram_info.timing_info->fsp_table[1],  in dram_dvfs_get_freq_info()
318 		if (!dram_info.bypass_mode) {  in dram_dvfs_get_freq_info()
319 			SMC_RET4(handle, dram_info.timing_info->fsp_table[2],  in dram_dvfs_get_freq_info()
322 		SMC_RET4(handle, dram_info.timing_info->fsp_table[2],  in dram_dvfs_get_freq_info()
325 		 SMC_RET4(handle, dram_info.timing_info->fsp_table[3],  in dram_dvfs_get_freq_info()
341 		SMC_RET1(handle, dram_info.num_fsp);  in dram_dvfs_handler()
372 		if (dram_info.dram_type == DDRC_LPDDR4) {  in dram_dvfs_handler()
373 			lpddr4_swffc(&dram_info, dev_fsp, fsp_index);  in dram_dvfs_handler()
376 			ddr4_swffc(&dram_info, fsp_index);  in dram_dvfs_handler()
379 		dram_info.current_fsp = fsp_index;  in dram_dvfs_handler()