122 	u_register_t scr_el3;  in setup_secure_context()  local
126 	scr_el3 = read_ctx_reg(state, CTX_SCR_EL3);  in setup_secure_context()
133 	scr_el3 |= get_scr_el3_from_routing_model(SECURE);  in setup_secure_context()
138 		scr_el3 |= SCR_ATA_BIT;  in setup_secure_context()
141 	write_ctx_reg(state, CTX_SCR_EL3, scr_el3);  in setup_secure_context()
163 	u_register_t scr_el3;  in setup_realm_context()  local
168 	scr_el3 = read_ctx_reg(state, CTX_SCR_EL3);  in setup_realm_context()
171 	scr_el3 |= SCR_NS_BIT | SCR_NSE_BIT;  in setup_realm_context()
178 		scr_el3 |= SCR_EnSCXT_BIT;  in setup_realm_context()
185 		scr_el3 |= SCR_SCTLR2En_BIT;  in setup_realm_context()
194 		scr_el3 |= SCR_D128En_BIT;  in setup_realm_context()
197 	write_ctx_reg(state, CTX_SCR_EL3, scr_el3);  in setup_realm_context()
234 	u_register_t scr_el3;  in setup_ns_context()  local
238 	scr_el3 = read_ctx_reg(state, CTX_SCR_EL3);  in setup_ns_context()
241 	scr_el3 |= SCR_NS_BIT;  in setup_ns_context()
245 		scr_el3 |= SCR_ATA_BIT;  in setup_ns_context()
268 		scr_el3 |= SCR_API_BIT | SCR_APK_BIT;  in setup_ns_context()
273 	scr_el3 |= SCR_EA_BIT;  in setup_ns_context()
283 	scr_el3 |= SCR_TERR_BIT;  in setup_ns_context()
289 		scr_el3 |= SCR_EnSCXT_BIT;  in setup_ns_context()
297 	scr_el3 |= get_scr_el3_from_routing_model(NON_SECURE);  in setup_ns_context()
304 		scr_el3 |= SCR_RCWMASKEn_BIT;  in setup_ns_context()
311 		scr_el3 |= SCR_SCTLR2En_BIT;  in setup_ns_context()
319 		scr_el3 |= SCR_D128En_BIT;  in setup_ns_context()
326 		scr_el3 |= SCR_EnFPM_BIT;  in setup_ns_context()
333 		scr_el3 |= SCR_AIEn_BIT;  in setup_ns_context()
340 		scr_el3 |= SCR_PFAREn_BIT;  in setup_ns_context()
343 	write_ctx_reg(state, CTX_SCR_EL3, scr_el3);  in setup_ns_context()
391 	u_register_t scr_el3;  in setup_context_common()  local
426 	scr_el3 = SCR_RESET_VAL;  in setup_context_common()
441 	scr_el3 &= ~(SCR_TWE_BIT | SCR_TWI_BIT | SCR_SMD_BIT);  in setup_context_common()
443 	scr_el3 |= SCR_SIF_BIT;  in setup_context_common()
450 		scr_el3 |= SCR_RW_BIT;  in setup_context_common()
461 		scr_el3 |= SCR_HCE_BIT;  in setup_context_common()
472 		scr_el3 |= SCR_ST_BIT;  in setup_context_common()
480 		scr_el3 |= SCR_HXEn_BIT;  in setup_context_common()
489 		scr_el3 |= SCR_ADEn_BIT | SCR_EnAS0_BIT;  in setup_context_common()
497 		scr_el3 |= SCR_TRNDR_BIT;  in setup_context_common()
502 	scr_el3 |= SCR_FIEN_BIT;  in setup_context_common()
515 		scr_el3 |= SCR_API_BIT | SCR_APK_BIT;  in setup_context_common()
523 		scr_el3 |= SCR_PIEN_BIT;  in setup_context_common()
528 		scr_el3 |= SCR_GCSEn_BIT;  in setup_context_common()
533 		scr_el3 |= SCR_FGTEN_BIT;  in setup_context_common()
538 		scr_el3 |= SCR_ECVEN_BIT;  in setup_context_common()
544 		scr_el3 &= ~(SCR_TWEDEL_MASK << SCR_TWEDEL_SHIFT);  in setup_context_common()
545 		scr_el3 |= ((TWED_DELAY & SCR_TWEDEL_MASK)  in setup_context_common()
549 		scr_el3 |= SCR_TWEDEn_BIT;  in setup_context_common()
555 		scr_el3 |= SCR_EEL2_BIT;  in setup_context_common()
560 		scr_el3 |= SCR_MECEn_BIT;  in setup_context_common()
567 	write_ctx_reg(state, CTX_SCR_EL3, scr_el3);  in setup_context_common()
1037 	u_register_t scr_el3;  in init_nonsecure_el2_unused()  local
1039 	scr_el3 = read_ctx_reg(get_el3state_ctx(ctx), CTX_SCR_EL3);  in init_nonsecure_el2_unused()
1042 	if ((scr_el3 & SCR_RW_BIT) != 0U) {  in init_nonsecure_el2_unused()
1147 	u_register_t sctlr_el2, scr_el3;  in cm_prepare_el3_exit()  local
1155 		scr_el3 = read_ctx_reg(get_el3state_ctx(ctx),  in cm_prepare_el3_exit()
1187 			if ((scr_el3 & SCR_HCE_BIT) != 0U) {  in cm_prepare_el3_exit()
1372 	u_register_t scr_el3 = read_scr_el3();  in el2_sysregs_context_save_gic()  local
1377 	write_scr_el3(scr_el3 | SCR_NS_BIT);  in el2_sysregs_context_save_gic()
1382 	write_scr_el3(scr_el3);  in el2_sysregs_context_save_gic()
1389 			write_scr_el3(scr_el3 & ~SCR_NS_BIT);  in el2_sysregs_context_save_gic()
1391 			write_scr_el3(scr_el3 | SCR_NS_BIT);  in el2_sysregs_context_save_gic()
1399 		write_scr_el3(scr_el3);  in el2_sysregs_context_save_gic()
1406 	u_register_t scr_el3 = read_scr_el3();  in el2_sysregs_context_restore_gic()  local
1411 	write_scr_el3(scr_el3 | SCR_NS_BIT);  in el2_sysregs_context_restore_gic()
1416 	write_scr_el3(scr_el3);  in el2_sysregs_context_restore_gic()
1423 			write_scr_el3(scr_el3 & ~SCR_NS_BIT);  in el2_sysregs_context_restore_gic()
1425 			write_scr_el3(scr_el3 | SCR_NS_BIT);  in el2_sysregs_context_restore_gic()
1433 		write_scr_el3(scr_el3);  in el2_sysregs_context_restore_gic()
1718 	u_register_t scr_el3 = read_ctx_reg(get_el3state_ctx(ctx), CTX_SCR_EL3);  in cm_prepare_el3_exit_ns()  local
1719 	assert(((scr_el3 & SCR_HCE_BIT) != 0UL) &&  in cm_prepare_el3_exit_ns()
2044 	u_register_t scr_el3;  in cm_write_scr_el3_bit()  local
2060 	scr_el3 = read_ctx_reg(state, CTX_SCR_EL3);  in cm_write_scr_el3_bit()
2061 	scr_el3 &= ~(1UL << bit_pos);  in cm_write_scr_el3_bit()
2062 	scr_el3 |= (u_register_t)value << bit_pos;  in cm_write_scr_el3_bit()
2063 	write_ctx_reg(state, CTX_SCR_EL3, scr_el3);  in cm_write_scr_el3_bit()