Lines Matching refs:GENMASK_32

47 #define SWSTAT_SWDONE_ACK_MASK	GENMASK_32(1U, 0U)
49 #define MSTR_DRAM_MASK		GENMASK_32(5U, 0U)
50 #define MSTR_ACT_RANKS_MASK GENMASK_32(25U, 24U)
57 #define DRAMTMG2_RD_WR_MASK GENMASK_32(4U, 0U)
59 #define DRAMTMG2_WR_RD_MASK GENMASK_32(4U, 0U)
63 #define DFITMG1_WRDATA_DELAY_MASK GENMASK_32(4U, 0U)
65 #define RANKCTL_RD_GAP_MASK GENMASK_32(3U, 0U)
67 #define RANKCTL_WR_GAP_MASK GENMASK_32(3U, 0U)
69 #define DDR_SS_AXI_PARITY_ENABLE_MASK	GENMASK_32(12U, 4U)
70 #define DDR_SS_AXI_PARITY_TYPE_MASK	GENMASK_32(24U, 16U)
87 #define	STAT_OPERATING_MODE_MASK	GENMASK_32(2U, 0U)
184 #define SELFREF_TYPE_MASK         GENMASK_32(5U, 4U)