Lines Matching refs:rcc

6 #include <dt-bindings/clock/st,stm32mp21-rcc.h>
8 #include <dt-bindings/reset/st,stm32mp21-rcc.h>
131 				clocks = <&rcc CK_KER_USART2>;
132 				resets = <&rcc USART2_R>;
139 				clocks = <&rcc CK_KER_USART3>;
140 				resets = <&rcc USART3_R>;
147 				clocks = <&rcc CK_KER_UART4>;
148 				resets = <&rcc UART4_R>;
155 				clocks = <&rcc CK_KER_UART5>;
156 				resets = <&rcc UART5_R>;
163 				clocks = <&rcc CK_KER_I2C1>;
164 				resets = <&rcc I2C1_R>;
171 				clocks = <&rcc CK_KER_I2C2>;
172 				resets = <&rcc I2C2_R>;
179 				clocks = <&rcc CK_KER_USART6>;
180 				resets = <&rcc USART6_R>;
187 				clocks = <&rcc CK_KER_USART1>;
188 				resets = <&rcc USART1_R>;
195 				clocks = <&rcc CK_KER_UART7>;
196 				resets = <&rcc UART7_R>;
203 				clocks = <&rcc CK_BUS_HASH1>;
204 				resets = <&rcc HASH1_R>;
211 				clocks = <&rcc CK_KER_OSPI1>;
212 				resets = <&rcc OSPI1_R>, <&rcc OSPI1DLL_R>;
219 				clocks = <&rcc CK_BUS_RNG2>;
220 				resets = <&rcc RNG2_R>;
227 				clocks = <&rcc CK_BUS_RNG1>;
228 				resets = <&rcc RNG1_R>;
235 				clocks = <&rcc CK_BUS_IWDG1>, <&rcc LSI_CK>;
243 				clocks = <&rcc CK_KER_I2C3>;
244 				resets = <&rcc I2C3_R>;
252 				clocks = <&rcc CK_KER_SDMMC1>;
254 				resets = <&rcc SDMMC1_R>;
265 				clocks = <&rcc CK_KER_SDMMC2>;
267 				resets = <&rcc SDMMC2_R>;
278 			clocks = <&rcc CK_KER_OSPI1>;
285 			clocks = <&rcc CK_BUS_RISAF4>;
327 		rcc: clock-controller@44200000 {  label
328 			compatible = "st,stm32mp21-rcc";
363 			clocks = <&rcc CK_BUS_RTC>;
412 			clocks = <&rcc CK_KER_FMC>;
413 			resets = <&rcc FMC_R>;
448 				clocks = <&rcc CK_BUS_GPIOA>;
459 				clocks = <&rcc CK_BUS_GPIOB>;
470 				clocks = <&rcc CK_BUS_GPIOC>;
481 				clocks = <&rcc CK_BUS_GPIOD>;
492 				clocks = <&rcc CK_BUS_GPIOE>;
503 				clocks = <&rcc CK_BUS_GPIOF>;
514 				clocks = <&rcc CK_BUS_GPIOG>;
525 				clocks = <&rcc CK_BUS_GPIOH>;
536 				clocks = <&rcc CK_BUS_GPIOI>;
554 				clocks = <&rcc CK_BUS_GPIOZ>;