Lines Matching refs:pll_conf
2169 struct stm32_pll_dt_cfg *pll_conf = &pdata->pll[pll_idx]; in stm32mp1_pll_configure_src() local
2171 if (!pll_conf->status) { in stm32mp1_pll_configure_src()
2175 return stm32_clk_configure_mux(priv, pll_conf->src); in stm32mp1_pll_configure_src()
2182 struct stm32_pll_dt_cfg *pll_conf = pdata->pll; in stm32mp1_clk_init() local
2192 if (!pll_conf[_PLL1].status) { in stm32mp1_clk_init()
2193 ret = clk_get_pll1_settings(pll_conf[_PLL2].src, PLL1_NOMINAL_FREQ_IN_KHZ, in stm32mp1_clk_init()
2194 pll_conf[_PLL1].cfg, &pll_conf[_PLL1].frac); in stm32mp1_clk_init()
2199 pll_conf[_PLL1].status = true; in stm32mp1_clk_init()
2200 pll_conf[_PLL1].src = pll_conf[_PLL2].src; in stm32mp1_clk_init()
2253 pll_conf[_PLL3].src, in stm32mp1_clk_init()
2254 pll_conf[_PLL3].cfg, in stm32mp1_clk_init()
2255 pll_conf[_PLL3].frac); in stm32mp1_clk_init()
2257 pll_conf[_PLL4].src, in stm32mp1_clk_init()
2258 pll_conf[_PLL4].cfg, in stm32mp1_clk_init()
2259 pll_conf[_PLL4].frac); in stm32mp1_clk_init()
2324 if (!pll_conf[i].status) { in stm32mp1_clk_init()
2330 stm32mp1_pll_config_output(i, pll_conf[i].cfg); in stm32mp1_clk_init()
2334 ret = stm32mp1_pll_config(i, pll_conf[i].cfg, pll_conf[i].frac); in stm32mp1_clk_init()
2339 if (pll_conf[i].csg_enabled) { in stm32mp1_clk_init()
2340 stm32mp1_pll_csg(i, pll_conf[i].csg); in stm32mp1_clk_init()
2347 if (!pll_conf[i].status) { in stm32mp1_clk_init()
2351 ret = stm32mp1_pll_output(i, pll_conf[i].cfg[PLLCFG_O]); in stm32mp1_clk_init()