62 	struct stm32_pll_dt_cfg *pll;  member
1032 static unsigned long stm32mp1_pll_get_fref(const struct stm32mp1_clk_pll *pll)  in stm32mp1_pll_get_fref()  argument
1034 	uint32_t selr = mmio_read_32(stm32mp_rcc_base() + pll->rckxselr);  in stm32mp1_pll_get_fref()
1037 	return stm32mp1_clk_get_fixed(pll->refclk[src]);  in stm32mp1_pll_get_fref()
1046 static unsigned long stm32mp1_pll_get_fvco(const struct stm32mp1_clk_pll *pll)  in stm32mp1_pll_get_fvco()  argument
1052 	cfgr1 = mmio_read_32(rcc_base + pll->pllxcfgr1);  in stm32mp1_pll_get_fvco()
1053 	fracr = mmio_read_32(rcc_base + pll->pllxfracr);  in stm32mp1_pll_get_fvco()
1058 	refclk = stm32mp1_pll_get_fref(pll);  in stm32mp1_pll_get_fvco()
1085 	const struct stm32mp1_clk_pll *pll = pll_ref(pll_id);  in stm32mp1_read_pll_freq()  local
1093 	cfgr2 = mmio_read_32(stm32mp_rcc_base() + pll->pllxcfgr2);  in stm32mp1_read_pll_freq()
1096 	dfout = stm32mp1_pll_get_fvco(pll) / (divy + 1U);  in stm32mp1_read_pll_freq()
1729 	const struct stm32mp1_clk_pll *pll = pll_ref(pll_id);  in stm32mp1_check_pll_conf()  local
1731 	uintptr_t pllxcr = rcc_base + pll->pllxcr;  in stm32mp1_check_pll_conf()
1732 	enum stm32mp1_plltype type = pll->plltype;  in stm32mp1_check_pll_conf()
1750 	src = mmio_read_32(rcc_base + pll->rckxselr) & RCC_SELR_REFCLK_SRC_MASK;  in stm32mp1_check_pll_conf()
1752 	refclk = stm32mp1_clk_get_fixed(pll->refclk[src]) /  in stm32mp1_check_pll_conf()
1770 	if (mmio_read_32(rcc_base + pll->pllxcfgr1) != value) {  in stm32mp1_check_pll_conf()
1777 	if (mmio_read_32(rcc_base + pll->pllxfracr) != value) {  in stm32mp1_check_pll_conf()
1788 	if (mmio_read_32(rcc_base + pll->pllxcfgr2) != value) {  in stm32mp1_check_pll_conf()
1797 	const struct stm32mp1_clk_pll *pll = pll_ref(pll_id);  in stm32mp1_pll_start()  local
1798 	uintptr_t pllxcr = stm32mp_rcc_base() + pll->pllxcr;  in stm32mp1_pll_start()
1809 	const struct stm32mp1_clk_pll *pll = pll_ref(pll_id);  in stm32mp1_pll_output()  local
1810 	uintptr_t pllxcr = stm32mp_rcc_base() + pll->pllxcr;  in stm32mp1_pll_output()
1830 	const struct stm32mp1_clk_pll *pll = pll_ref(pll_id);  in stm32mp1_pll_stop()  local
1831 	uintptr_t pllxcr = stm32mp_rcc_base() + pll->pllxcr;  in stm32mp1_pll_stop()
1857 	const struct stm32mp1_clk_pll *pll = pll_ref(pll_id);  in stm32mp1_pll_config_output()  local
1867 	mmio_write_32(rcc_base + pll->pllxcfgr2, value);  in stm32mp1_pll_config_output()
1873 	const struct stm32mp1_clk_pll *pll = pll_ref(pll_id);  in stm32mp1_pll_config()  local
1875 	enum stm32mp1_plltype type = pll->plltype;  in stm32mp1_pll_config()
1880 	src = mmio_read_32(rcc_base + pll->rckxselr) &  in stm32mp1_pll_config()
1883 	refclk = stm32mp1_clk_get_fixed(pll->refclk[src]) /  in stm32mp1_pll_config()
1901 	mmio_write_32(rcc_base + pll->pllxcfgr1, value);  in stm32mp1_pll_config()
1905 	mmio_write_32(rcc_base + pll->pllxfracr, value);  in stm32mp1_pll_config()
1908 	mmio_write_32(rcc_base + pll->pllxfracr, value);  in stm32mp1_pll_config()
1911 	mmio_write_32(rcc_base + pll->pllxfracr, value);  in stm32mp1_pll_config()
1920 	const struct stm32mp1_clk_pll *pll = pll_ref(pll_id);  in stm32mp1_pll_csg()  local
1932 	mmio_write_32(stm32mp_rcc_base() + pll->pllxcsgr, pllxcsg);  in stm32mp1_pll_csg()
1934 	mmio_setbits_32(stm32mp_rcc_base() + pll->pllxcr,  in stm32mp1_pll_csg()
2169 	struct stm32_pll_dt_cfg *pll_conf = &pdata->pll[pll_idx];  in stm32mp1_pll_configure_src()
2182 	struct stm32_pll_dt_cfg *pll_conf = pdata->pll;  in stm32mp1_clk_init()
2489 		const struct stm32mp1_clk_pll *pll = pll_ref(pll_id);  in get_parent_id_parent()  local
2491 		p_sel = mmio_read_32(rcc_base + pll->rckxselr) &  in get_parent_id_parent()
2494 		if (pll->refclk[p_sel] != _UNKNOWN_OSC_ID) {  in get_parent_id_parent()
2495 			return (int)pll->refclk[p_sel];  in get_parent_id_parent()
2630 	.pll		= mp15_pll,
2671 static int clk_stm32_load_vco_config(void *fdt, int subnode, struct stm32_pll_dt_cfg *pll)  in clk_stm32_load_vco_config()  argument
2675 	err = fdt_read_uint32_array(fdt, subnode, "divmn", (int)PLL_DIV_MN_NB, &pll->cfg[PLLCFG_M]);  in clk_stm32_load_vco_config()
2680 	err = fdt_read_uint32_array(fdt, subnode, "csg", (int)PLLCSG_NB, pll->csg);  in clk_stm32_load_vco_config()
2682 		pll->csg_enabled = true;  in clk_stm32_load_vco_config()
2684 		pll->csg_enabled = false;  in clk_stm32_load_vco_config()
2689 	pll->status = true;  in clk_stm32_load_vco_config()
2691 	pll->frac = fdt_read_uint32_default(fdt, subnode, "frac", 0);  in clk_stm32_load_vco_config()
2693 	pll->src = fdt_read_uint32_default(fdt, subnode, "src", UINT32_MAX);  in clk_stm32_load_vco_config()
2698 static int clk_stm32_load_output_config(void *fdt, int subnode, struct stm32_pll_dt_cfg *pll)  in clk_stm32_load_output_config()  argument
2703 				    &pll->cfg[PLLCFG_P]);  in clk_stm32_load_output_config()
2708 	pll->cfg[PLLCFG_O] = PQR(1, 1, 1);  in clk_stm32_load_output_config()
2713 static int clk_stm32_parse_pll_fdt(void *fdt, int subnode, struct stm32_pll_dt_cfg *pll)  in clk_stm32_parse_pll_fdt()  argument
2741 	err = clk_stm32_load_vco_config(fdt, subnode_vco, pll);  in clk_stm32_parse_pll_fdt()
2746 	err = clk_stm32_load_output_config(fdt, subnode_pll, pll);  in clk_stm32_parse_pll_fdt()
2759 		struct stm32_pll_dt_cfg *pll = pdata->pll + i;  in stm32_clk_parse_fdt_all_pll()  local
2771 		err = clk_stm32_parse_pll_fdt(fdt, subnode, pll);  in stm32_clk_parse_fdt_all_pll()