Lines Matching refs:_PLL1
425 _PLL1, enumerator
812 _CLK_PLL(_PLL1, PLL_1600,
1119 clock = stm32mp1_read_pll_freq(_PLL1, _DIV_P); in get_clock_rate()
1122 clock = stm32mp1_read_pll_freq(_PLL1, _DIV_P); in get_clock_rate()
1258 clock = stm32mp1_read_pll_freq(_PLL1, _DIV_P); in get_clock_rate()
1261 clock = stm32mp1_read_pll_freq(_PLL1, _DIV_Q); in get_clock_rate()
1264 clock = stm32mp1_read_pll_freq(_PLL1, _DIV_R); in get_clock_rate()
2192 if (!pll_conf[_PLL1].status) { in stm32mp1_clk_init()
2194 pll_conf[_PLL1].cfg, &pll_conf[_PLL1].frac); in stm32mp1_clk_init()
2199 pll_conf[_PLL1].status = true; in stm32mp1_clk_init()
2200 pll_conf[_PLL1].src = pll_conf[_PLL2].src; in stm32mp1_clk_init()
2298 ret = stm32mp1_pll_configure_src(priv, _PLL1); in stm32mp1_clk_init()
2446 pll_id = _PLL1; in get_parent_id_parent()
2758 for (i = _PLL1; i < pdata->npll; i++) { in stm32_clk_parse_fdt_all_pll()