Lines Matching refs:pllxcfgr4
885 uintptr_t pllxcfgr4 = pllxcfgr1 + RCC_OFFSET_PLLXCFGR4; in clk_stm32_pll_recalc_rate() local
894 if ((mmio_read_32(pllxcfgr4) & RCC_PLLxCFGR4_BYPASS) != 0U) { in clk_stm32_pll_recalc_rate()
1632 uintptr_t pllxcfgr4 = pllxcfgr1 + RCC_OFFSET_PLLXCFGR4; in clk_stm32_pll_config_output() local
1651 mmio_clrbits_32(pllxcfgr4, RCC_PLLxCFGR4_DSMEN); in clk_stm32_pll_config_output()
1669 mmio_setbits_32(pllxcfgr4, RCC_PLLxCFGR4_DSMEN); in clk_stm32_pll_config_output()
1686 mmio_setbits_32(pllxcfgr4, RCC_PLLxCFGR4_BYPASS); in clk_stm32_pll_config_output()
1687 mmio_clrbits_32(pllxcfgr4, RCC_PLLxCFGR4_FOUTPOSTDIVEN); in clk_stm32_pll_config_output()
1689 mmio_clrbits_32(pllxcfgr4, RCC_PLLxCFGR4_BYPASS); in clk_stm32_pll_config_output()
1690 mmio_setbits_32(pllxcfgr4, RCC_PLLxCFGR4_FOUTPOSTDIVEN); in clk_stm32_pll_config_output()
1702 uintptr_t pllxcfgr4 = pllxcfgr1 + RCC_OFFSET_PLLXCFGR4; in clk_stm32_pll_config_csg() local
1723 mmio_setbits_32(pllxcfgr4, RCC_PLLxCFGR4_DSMEN); in clk_stm32_pll_config_csg()