707 	uint16_t clk_id;  member
713 		.clk_id = (_clk_id),\
802 			      pll->clk_id - _CK_PLL1 + 1, pll->reg_pllxcfgr1,  in _clk_stm32_pll_wait_ready_on()
821 			      pll->clk_id - _CK_PLL1 + 1, pllxcfgr1, mmio_read_32(pllxcfgr1));  in _clk_stm32_pll_wait_ready_off()
1637 	refclk = _clk_stm32_get_parent_rate(priv, pll->clk_id);  in clk_stm32_pll_config_output()
1751 	refclk = _clk_stm32_get_parent_rate(priv, pll->clk_id);  in _clk_stm32_pll1_init()
1782 			EARLY_ERROR("PLL%d ref clock not started\n", pll->clk_id - _CK_PLL1 + 1);  in clk_stm32_pll_wait_mux_ready()
2136 	int clk_id = 0;  in stm32_clk_configure_clk()  local
2139 	clk_id = stm32_clk_configure_clk_get_binding_id(priv, data);  in stm32_clk_configure_clk()
2140 	if (clk_id < 0) {  in stm32_clk_configure_clk()
2141 		return clk_id;  in stm32_clk_configure_clk()
2145 		ret = _clk_stm32_set_parent_by_index(priv, clk_id, sel);  in stm32_clk_configure_clk()
2152 		clk_stm32_enable_call_ops(priv, clk_id);  in stm32_clk_configure_clk()
2154 		clk_stm32_disable_call_ops(priv, clk_id);  in stm32_clk_configure_clk()