983 	uint8_t channel = cfg->id;  in clk_flexgen_recalc()  local
986 	prediv = mmio_read_32(rcc_base + RCC_PREDIV0CFGR + (0x4U * channel)) &  in clk_flexgen_recalc()
988 	findiv = mmio_read_32(rcc_base + RCC_FINDIV0CFGR + (0x4U * channel)) &  in clk_flexgen_recalc()
1034 	uint8_t channel = cfg->id;  in clk_flexgen_gate_enable()  local
1036 	mmio_setbits_32(rcc_base + RCC_FINDIV0CFGR + (0x4U * channel),  in clk_flexgen_gate_enable()
1047 	uint8_t channel = cfg->id;  in clk_flexgen_gate_disable()  local
1049 	mmio_clrbits_32(rcc_base + RCC_FINDIV0CFGR + (0x4U * channel),  in clk_flexgen_gate_disable()
1058 	uint8_t channel = cfg->id;  in clk_flexgen_gate_is_enabled()  local
1060 	return !!(mmio_read_32(rcc_base + RCC_FINDIV0CFGR + (0x4U * channel)) &  in clk_flexgen_gate_is_enabled()
1864 static int wait_predivsr(uint16_t channel)  in wait_predivsr()  argument
1872 	if (channel < __WORD_BIT) {  in wait_predivsr()
1874 		channel_bit = BIT(channel);  in wait_predivsr()
1877 		channel_bit = BIT(channel - __WORD_BIT);  in wait_predivsr()
1892 static int wait_findivsr(uint16_t channel)  in wait_findivsr()  argument
1900 	if (channel < __WORD_BIT) {  in wait_findivsr()
1902 		channel_bit = BIT(channel);  in wait_findivsr()
1905 		channel_bit = BIT(channel - __WORD_BIT);  in wait_findivsr()
1920 static int wait_xbar_sts(uint16_t channel)  in wait_xbar_sts()  argument
1924 	uintptr_t xbar_cfgr = rcc_base + RCC_XBAR0CFGR + (0x4U * channel);  in wait_xbar_sts()
1930 			EARLY_ERROR("XBAR%uCFGR: %x\n", channel,  in wait_xbar_sts()
1939 static void flexclkgen_config_channel(uint16_t channel, unsigned int clk_src,  in flexclkgen_config_channel()  argument
1945 	if (wait_predivsr(channel) != 0) {  in flexclkgen_config_channel()
1949 	mmio_clrsetbits_32(rcc_base + RCC_PREDIV0CFGR + (0x4U * channel),  in flexclkgen_config_channel()
1953 	if (wait_predivsr(channel) != 0) {  in flexclkgen_config_channel()
1957 	if (wait_findivsr(channel) != 0) {  in flexclkgen_config_channel()
1961 	mmio_clrsetbits_32(rcc_base + RCC_FINDIV0CFGR + (0x4U * channel),  in flexclkgen_config_channel()
1965 	if (wait_findivsr(channel) != 0) {  in flexclkgen_config_channel()
1969 	if (wait_xbar_sts(channel) != 0) {  in flexclkgen_config_channel()
1973 	mmio_clrsetbits_32(rcc_base + RCC_XBAR0CFGR + (0x4U * channel),  in flexclkgen_config_channel()
1976 	mmio_setbits_32(rcc_base + RCC_XBAR0CFGR + (0x4U * channel),  in flexclkgen_config_channel()
1979 	if (wait_xbar_sts(channel) != 0) {  in flexclkgen_config_channel()
1992 		unsigned int channel, clk_src, pdiv, fdiv;  in stm32mp2_clk_flexgen_configure()  local
2001 		channel = (cmd_data & FLEX_ID_MASK) >> FLEX_ID_SHIFT;  in stm32mp2_clk_flexgen_configure()
2006 		switch (channel) {  in stm32mp2_clk_flexgen_configure()
2011 			flexclkgen_config_channel(channel, clk_src, pdiv, fdiv);  in stm32mp2_clk_flexgen_configure()