st/clk/clk-stm32mp2.c

344 	MUX_CONF(MUX_RTC, rtc_src, RCC_BDCR, 16, 2),
482 	GATE_CFG(GATE_LSE,		RCC_BDCR,		0,	0),
486 	GATE_CFG(GATE_LSI,		RCC_BDCR,		9,	0),
488 	GATE_CFG(GATE_RTCCK,		RCC_BDCR,		20,	0),
500 	GATE_CFG(GATE_LSI_RDY,		RCC_BDCR,		10,	0),
502 	GATE_CFG(GATE_LSE_RDY,		RCC_BDCR,		2,	0),
663 		   BYPASS(RCC_BDCR, 1, 3),
664 		   CSS(RCC_BDCR, 8),
665 		   DRIVE(RCC_BDCR, 4, 2, 2)),
1091 	uintptr_t address = priv->base + RCC_BDCR;  in clk_stm32_osc_msi_set_rate()
1122 	uintptr_t address = priv->base + RCC_BDCR;  in clk_stm32_osc_msi_recalc_rate()