323 #define MUX_CONF(id, src, _offset, _shift, _witdh)[id] = {\  argument
475 #define GATE_CFG(id, _offset, _bit_idx, _offset_clr)[id] = {\  argument
614 #define DIV_CFG(id, _offset, _shift, _width, _flags, _table, _bitrdy)[id] = {\  argument
675 static const char *clk_stm32_get_oscillator_name(enum stm32_osc id)  in clk_stm32_get_oscillator_name()
851 static bool clk_stm32_pll_is_enabled(struct stm32_clk_priv *priv, int id)  in clk_stm32_pll_is_enabled()
860 static int clk_stm32_pll_enable(struct stm32_clk_priv *priv, int id)  in clk_stm32_pll_enable()
869 static void clk_stm32_pll_disable(struct stm32_clk_priv *priv, int id)  in clk_stm32_pll_disable()
878 static unsigned long clk_stm32_pll_recalc_rate(struct stm32_clk_priv *priv, int id,  in clk_stm32_pll_recalc_rate()
938 						int id, unsigned long prate)  in clk_stm32_pll1_recalc_rate()
973 	uint8_t id;  member
1042 static void clk_flexgen_gate_disable(struct stm32_clk_priv *priv, int id)  in clk_flexgen_gate_disable()
1053 static bool clk_flexgen_gate_is_enabled(struct stm32_clk_priv *priv, int id)  in clk_flexgen_gate_is_enabled()
1088 static int clk_stm32_osc_msi_set_rate(struct stm32_clk_priv *priv, int id, unsigned long rate,  in clk_stm32_osc_msi_set_rate()