Lines Matching refs:pll_addr
279 static void disable_odiv(uintptr_t pll_addr, uint32_t div_index) in disable_odiv() argument
281 mmio_clrbits_32(PLLDIG_PLLODIV(pll_addr, div_index), PLLDIG_PLLODIV_DE); in disable_odiv()
284 static void enable_odiv(uintptr_t pll_addr, uint32_t div_index) in enable_odiv() argument
286 mmio_setbits_32(PLLDIG_PLLODIV(pll_addr, div_index), PLLDIG_PLLODIV_DE); in enable_odiv()
289 static void enable_odivs(uintptr_t pll_addr, uint32_t ndivs, uint32_t mask) in enable_odivs() argument
295 enable_odiv(pll_addr, i); in enable_odivs()
300 static int adjust_odiv_settings(const struct s32cc_pll *pll, uintptr_t pll_addr, in adjust_odiv_settings() argument
316 pllodiv = mmio_read_32(PLLDIG_PLLODIV(pll_addr, i)); in adjust_odiv_settings()
331 mmio_write_32(PLLDIG_PLLODIV(pll_addr, i), pllodiv); in adjust_odiv_settings()
337 static uint32_t get_enabled_odivs(uintptr_t pll_addr, uint32_t ndivs) in get_enabled_odivs() argument
344 pllodiv = mmio_read_32(PLLDIG_PLLODIV(pll_addr, i)); in get_enabled_odivs()
353 static void disable_odivs(uintptr_t pll_addr, uint32_t ndivs) in disable_odivs() argument
358 disable_odiv(pll_addr, i); in disable_odivs()
362 static void enable_pll_hw(uintptr_t pll_addr) in enable_pll_hw() argument
365 mmio_write_32(PLLDIG_PLLCR(pll_addr), 0x0); in enable_pll_hw()
368 while ((mmio_read_32(PLLDIG_PLLSR(pll_addr)) & PLLDIG_PLLSR_LOCK) == 0U) { in enable_pll_hw()
372 static void disable_pll_hw(uintptr_t pll_addr) in disable_pll_hw() argument
374 mmio_write_32(PLLDIG_PLLCR(pll_addr), PLLDIG_PLLCR_PLLPD); in disable_pll_hw()
396 static int program_pll(const struct s32cc_pll *pll, uintptr_t pll_addr, in program_pll() argument
416 odivs_mask = get_enabled_odivs(pll_addr, pll->ndividers); in program_pll()
418 if (is_pll_enabled(pll_addr)) { in program_pll()
426 disable_odivs(pll_addr, pll->ndividers); in program_pll()
429 disable_pll_hw(pll_addr); in program_pll()
432 mmio_write_32(PLLDIG_PLLCLKMUX(pll_addr), sclk_id); in program_pll()
435 mmio_clrsetbits_32(PLLDIG_PLLDV(pll_addr), in program_pll()
439 mmio_write_32(PLLDIG_PLLFD(pll_addr), in program_pll()
442 ret = adjust_odiv_settings(pll, pll_addr, odivs_mask, old_vco); in program_pll()
447 enable_pll_hw(pll_addr); in program_pll()
450 enable_odivs(pll_addr, pll->ndividers, odivs_mask); in program_pll()
463 uintptr_t pll_addr = UL(0x0); in enable_pll() local
483 ret = get_base_addr(pll->instance, drv, &pll_addr); in enable_pll()
500 pll_addr); in enable_pll()
509 pll_enabled = is_pll_enabled(pll_addr); in enable_pll()
510 clk_src = mmio_read_32(PLLDIG_PLLCLKMUX(pll_addr)); in enable_pll()
517 return program_pll(pll, pll_addr, drv, sclk_id, sclk_freq, ldepth); in enable_pll()
538 static void config_pll_out_div(uintptr_t pll_addr, uint32_t div_index, uint32_t dc) in config_pll_out_div() argument
543 pllodiv = mmio_read_32(PLLDIG_PLLODIV(pll_addr, div_index)); in config_pll_out_div()
551 disable_odiv(pll_addr, div_index); in config_pll_out_div()
555 mmio_write_32(PLLDIG_PLLODIV(pll_addr, div_index), pllodiv); in config_pll_out_div()
557 enable_odiv(pll_addr, div_index); in config_pll_out_div()
576 uintptr_t pll_addr = 0x0ULL; in enable_pll_div() local
594 ret = get_base_addr(pll->instance, drv, &pll_addr); in enable_pll_div()
603 pll_addr); in enable_pll_div()
609 config_pll_out_div(pll_addr, pdiv->index, dc); in enable_pll_div()
1588 uintptr_t pll_addr = 0UL; in get_pll_freq() local
1597 ret = get_base_addr(pll->instance, drv, &pll_addr); in get_pll_freq()
1604 if (!is_pll_enabled(pll_addr)) { in get_pll_freq()
1609 clk_src = mmio_read_32(PLLDIG_PLLCLKMUX(pll_addr)); in get_pll_freq()
1634 plldv = mmio_read_32(PLLDIG_PLLDV(pll_addr)); in get_pll_freq()
1642 mfn = PLLDIG_PLLFD_MFN_SET(mmio_read_32(PLLDIG_PLLFD(pll_addr))); in get_pll_freq()
1708 uintptr_t pll_addr = 0UL; in get_pll_div_freq() local
1725 ret = get_base_addr(pll->instance, drv, &pll_addr); in get_pll_div_freq()
1734 pll_addr); in get_pll_div_freq()
1738 pllodiv = mmio_read_32(PLLDIG_PLLODIV(pll_addr, pdiv->index)); in get_pll_div_freq()