Lines Matching refs:drv

41 			   const struct s32cc_clk_drv *drv,
76 const struct s32cc_clk_drv *drv,
94 static int get_base_addr(enum s32cc_clk_source id, const struct s32cc_clk_drv *drv, in get_base_addr() argument
101 *base = drv->fxosc_base; in get_base_addr()
104 *base = drv->armpll_base; in get_base_addr()
107 *base = drv->periphpll_base; in get_base_addr()
110 *base = drv->ddrpll_base; in get_base_addr()
113 *base = drv->armdfs_base; in get_base_addr()
116 *base = drv->periphdfs_base; in get_base_addr()
119 *base = drv->cgm0_base; in get_base_addr()
122 *base = drv->cgm1_base; in get_base_addr()
125 *base = drv->cgm5_base; in get_base_addr()
143 static void enable_fxosc(const struct s32cc_clk_drv *drv) in enable_fxosc() argument
145 uintptr_t fxosc_base = drv->fxosc_base; in enable_fxosc()
168 const struct s32cc_clk_drv *drv, in enable_osc() argument
182 enable_fxosc(drv); in enable_osc()
397 const struct s32cc_clk_drv *drv, uint32_t sclk_id, in program_pll() argument
419 ret = get_module_rate(&pll->desc, drv, &old_vco, ldepth); in program_pll()
456 const struct s32cc_clk_drv *drv, in enable_pll() argument
483 ret = get_base_addr(pll->instance, drv, &pll_addr); in enable_pll()
504 ret = get_module_rate(&pll->desc, drv, &pll_vco, depth); in enable_pll()
517 return program_pll(pll, pll_addr, drv, sclk_id, sclk_freq, ldepth); in enable_pll()
572 const struct s32cc_clk_drv *drv, in enable_pll_div() argument
594 ret = get_base_addr(pll->instance, drv, &pll_addr); in enable_pll_div()
600 ret = get_module_rate(&pll->desc, drv, &pll_vco, ldepth); in enable_pll_div()
686 const struct s32cc_clk_drv *drv) in enable_cgm_mux() argument
692 ret = get_base_addr(mux->module, drv, &cgm_addr); in enable_cgm_mux()
723 const struct s32cc_clk_drv *drv, in enable_mux() argument
754 ret = enable_cgm_mux(mux, drv); in enable_mux()
757 ret = enable_cgm_mux(mux, drv); in enable_mux()
760 ret = enable_cgm_mux(mux, drv); in enable_mux()
783 const struct s32cc_clk_drv *drv, in enable_dfs() argument
798 const struct s32cc_clk_drv *drv, in get_dfs_freq() argument
811 ret = get_base_addr(dfs->instance, drv, &dfs_addr); in get_dfs_freq()
817 return get_module_rate(dfs->parent, drv, rate, ldepth); in get_dfs_freq()
954 const struct s32cc_clk_drv *drv, in enable_dfs_div() argument
975 ret = get_base_addr(dfs->instance, drv, &dfs_addr); in enable_dfs_div()
980 ret = get_module_rate(&dfs->desc, drv, &dfs_freq, depth); in enable_dfs_div()
994 const struct s32cc_clk_drv *drv,
998 const struct s32cc_clk_drv *drv, in enable_part() argument
1004 if ((drv->mc_me == 0UL) || (drv->mc_rgm == 0UL) || (drv->rdc == 0UL)) { in enable_part()
1008 return mc_me_enable_partition(drv->mc_me, drv->mc_rgm, drv->rdc, part_no); in enable_part()
1012 const struct s32cc_clk_drv *drv, in enable_part_block() argument
1030 mc_me_enable_part_cofb(drv->mc_me, part_no, cofb, block->status); in enable_part_block()
1048 const struct s32cc_clk_drv *drv,
1052 const struct s32cc_clk_drv *drv, in enable_part_block_link() argument
1066 return enable_module_with_refcount(&block->desc, drv, ldepth); in enable_part_block_link()
1078 const struct s32cc_clk_drv *drv, in get_part_block_link_freq() argument
1090 return get_module_rate(block->parent, drv, rate, ldepth); in get_part_block_link_freq()
1150 const struct s32cc_clk_drv *drv, unsigned int depth) in enable_cgm_div() argument
1181 ret = get_base_addr(mux->module, drv, &cgm_addr); in enable_cgm_div()
1188 ret = get_module_rate(cgm_div->parent, drv, &pfreq, ldepth); in enable_cgm_div()
1257 const struct s32cc_clk_drv *drv, in get_cgm_div_freq() argument
1282 ret = get_base_addr(mux->module, drv, &cgm_addr); in get_cgm_div_freq()
1294 ret = get_module_rate(cgm_div->parent, drv, &pfreq, ldepth); in get_cgm_div_freq()
1320 const struct s32cc_clk_drv *drv, in no_enable() argument
1327 const struct s32cc_clk_drv *drv, bool leaf_node, in exec_cb_with_refcount() argument
1344 return en_cb(mod, drv, ldepth); in exec_cb_with_refcount()
1348 ret = en_cb(mod, drv, ldepth); in exec_cb_with_refcount()
1361 const struct s32cc_clk_drv *drv, in enable_module() argument
1388 if (drv == NULL) { in enable_module()
1407 ret = exec_cb_with_refcount(enable_module, parent, drv, in enable_module()
1413 ret = exec_cb_with_refcount(enable_clbs[index], module, drv, in enable_module()
1423 const struct s32cc_clk_drv *drv, in enable_module_with_refcount() argument
1426 return exec_cb_with_refcount(enable_module, module, drv, false, depth); in enable_module_with_refcount()
1431 const struct s32cc_clk_drv *drv = get_drv(); in s32cc_clk_enable() local
1440 return enable_module_with_refcount(&clk->desc, drv, depth); in s32cc_clk_enable()
1476 const struct s32cc_clk_drv *drv, in get_osc_freq() argument
1528 const struct s32cc_clk_drv *drv, unsigned long *rate, in get_clk_freq() argument
1546 return get_module_rate(clk->module, drv, rate, ldepth); in get_clk_freq()
1554 return get_clk_freq(&clk->pclock->desc, drv, rate, ldepth); in get_clk_freq()
1580 const struct s32cc_clk_drv *drv, in get_pll_freq() argument
1597 ret = get_base_addr(pll->instance, drv, &pll_addr); in get_pll_freq()
1628 ret = get_module_rate(&source->desc, drv, &prate, ldepth); in get_pll_freq()
1702 const struct s32cc_clk_drv *drv, in get_pll_div_freq() argument
1725 ret = get_base_addr(pll->instance, drv, &pll_addr); in get_pll_div_freq()
1731 ret = get_module_rate(pdiv->parent, drv, &pfreq, ldepth); in get_pll_div_freq()
1777 const struct s32cc_clk_drv *drv, in get_fixed_div_freq() argument
1784 ret = get_module_rate(fdiv->parent, drv, &pfreq, depth); in get_fixed_div_freq()
1822 const struct s32cc_clk_drv *drv, in get_mux_freq() argument
1841 return get_clk_freq(&clk->desc, drv, rate, ldepth); in get_mux_freq()
1898 const struct s32cc_clk_drv *drv, in get_dfs_div_freq() argument
1919 ret = get_module_rate(dfs_div->parent, drv, &pfreq, ldepth); in get_dfs_div_freq()
1924 ret = get_base_addr(dfs->instance, drv, &dfs_addr); in get_dfs_div_freq()
2028 const struct s32cc_clk_drv *drv, in get_module_rate() argument
2042 ret = get_osc_freq(module, drv, rate, ldepth); in get_module_rate()
2045 ret = get_clk_freq(module, drv, rate, ldepth); in get_module_rate()
2048 ret = get_pll_freq(module, drv, rate, ldepth); in get_module_rate()
2051 ret = get_dfs_freq(module, drv, rate, ldepth); in get_module_rate()
2054 ret = get_dfs_div_freq(module, drv, rate, ldepth); in get_module_rate()
2057 ret = get_fixed_div_freq(module, drv, rate, ldepth); in get_module_rate()
2060 ret = get_pll_div_freq(module, drv, rate, ldepth); in get_module_rate()
2063 ret = get_mux_freq(module, drv, rate, ldepth); in get_module_rate()
2066 ret = get_mux_freq(module, drv, rate, ldepth); in get_module_rate()
2075 ret = get_part_block_link_freq(module, drv, rate, ldepth); in get_module_rate()
2078 ret = get_cgm_div_freq(module, drv, rate, ldepth); in get_module_rate()
2111 const struct s32cc_clk_drv *drv = get_drv(); in s32cc_clk_get_rate() local
2122 ret = get_module_rate(&clk->desc, drv, &rate, depth); in s32cc_clk_get_rate()
2259 static int s32cc_clk_mmap_regs(const struct s32cc_clk_drv *drv) in s32cc_clk_mmap_regs() argument
2262 drv->fxosc_base, in s32cc_clk_mmap_regs()
2263 drv->armpll_base, in s32cc_clk_mmap_regs()
2264 drv->periphpll_base, in s32cc_clk_mmap_regs()
2265 drv->armdfs_base, in s32cc_clk_mmap_regs()
2266 drv->periphdfs_base, in s32cc_clk_mmap_regs()
2267 drv->cgm0_base, in s32cc_clk_mmap_regs()
2268 drv->cgm1_base, in s32cc_clk_mmap_regs()
2269 drv->cgm5_base, in s32cc_clk_mmap_regs()
2270 drv->ddrpll_base, in s32cc_clk_mmap_regs()
2271 drv->mc_me, in s32cc_clk_mmap_regs()
2272 drv->mc_rgm, in s32cc_clk_mmap_regs()
2273 drv->rdc, in s32cc_clk_mmap_regs()
2303 const struct s32cc_clk_drv *drv; in s32cc_clk_register_drv() local
2307 drv = get_drv(); in s32cc_clk_register_drv()
2308 if (drv == NULL) { in s32cc_clk_register_drv()
2313 return s32cc_clk_mmap_regs(drv); in s32cc_clk_register_drv()