Lines Matching refs:dc
538 static void config_pll_out_div(uintptr_t pll_addr, uint32_t div_index, uint32_t dc) in config_pll_out_div() argument
546 if (((pdiv + 1U) == dc) && ((pllodiv & PLLDIG_PLLODIV_DE) != 0U)) { in config_pll_out_div()
554 pllodiv = PLLDIG_PLLODIV_DIV_SET(dc - 1U); in config_pll_out_div()
580 uint32_t dc; in enable_pll_div() local
607 dc = (uint32_t)(pll_vco / pdiv->freq); in enable_pll_div()
609 config_pll_out_div(pll_addr, pdiv->index, dc); in enable_pll_div()
1094 uint32_t dc, uint32_t div_index) in cgm_mux_div_config() argument
1101 if (dc_val == (MC_CGM_MUXn_DCm_DE | MC_CGM_MUXn_DCm_DIV_SET(dc))) { in cgm_mux_div_config()
1107 MC_CGM_MUXn_DCm_DE | MC_CGM_MUXn_DCm_DIV_SET(dc)); in cgm_mux_div_config()
1157 uint32_t dc; in enable_cgm_div() local
1197 dc = (uint32_t)dc64; in enable_cgm_div()
1203 cgm_div->freq, (unsigned long)(pfreq / dc)); in enable_cgm_div()
1207 cgm_mux_div_config(cgm_addr, mux->index, dc - 1U, cgm_div->index); in enable_cgm_div()
1658 unsigned long prate, dc; in set_pll_div_freq() local
1690 dc = prate / rate; in set_pll_div_freq()
1691 if ((prate / dc) != rate) { in set_pll_div_freq()
1711 uint32_t dc; in get_pll_div_freq() local
1746 dc = PLLDIG_PLLODIV_DIV(pllodiv); in get_pll_div_freq()
1747 *rate = (pfreq * FP_PRECISION) / (dc + 1U) / FP_PRECISION; in get_pll_div_freq()