81 	const struct s32cc_clk *clk = s32cc_obj2clk(module);  in get_clk_parent()  local
83 	if (clk->module != NULL) {  in get_clk_parent()
84 		return clk->module;  in get_clk_parent()
87 	if (clk->pclock != NULL) {  in get_clk_parent()
88 		return &clk->pclock->desc;  in get_clk_parent()
249 	const struct s32cc_clk *clk;  in get_pll_mux()  local
261 	clk = s32cc_obj2clk(source);  in get_pll_mux()
263 	if (clk->module == NULL) {  in get_pll_mux()
268 	source = clk->module;  in get_pll_mux()
706 	struct s32cc_clk *clk;  in get_mux_parent()  local
712 	clk = s32cc_get_arch_clk(mux->source_id);  in get_mux_parent()
713 	if (clk == NULL) {  in get_mux_parent()
719 	return &clk->desc;  in get_mux_parent()
728 	const struct s32cc_clk *clk;  in enable_mux()  local
740 	clk = s32cc_get_arch_clk(mux->source_id);  in enable_mux()
741 	if (clk == NULL) {  in enable_mux()
1119 	const struct s32cc_clk *clk;  in get_cgm_div_mux()  local
1131 	clk = s32cc_obj2clk(parent);  in get_cgm_div_mux()
1133 	if (clk->module == NULL) {  in get_cgm_div_mux()
1138 	mux_obj = clk->module;  in get_cgm_div_mux()
1433 	struct s32cc_clk *clk;  in s32cc_clk_enable()  local
1435 	clk = s32cc_get_arch_clk(id);  in s32cc_clk_enable()
1436 	if (clk == NULL) {  in s32cc_clk_enable()
1440 	return enable_module_with_refcount(&clk->desc, drv, depth);  in s32cc_clk_enable()
1501 	const struct s32cc_clk *clk = s32cc_obj2clk(module);  in set_clk_freq()  local
1509 	if ((clk->min_freq != 0UL) && (clk->max_freq != 0UL) &&  in set_clk_freq()
1510 	    ((rate < clk->min_freq) || (rate > clk->max_freq))) {  in set_clk_freq()
1512 		      rate, clk->min_freq, clk->max_freq);  in set_clk_freq()
1516 	if (clk->module != NULL) {  in set_clk_freq()
1517 		return set_module_rate(clk->module, rate, orate, depth);  in set_clk_freq()
1520 	if (clk->pclock != NULL) {  in set_clk_freq()
1521 		return set_clk_freq(&clk->pclock->desc, rate, orate, depth);  in set_clk_freq()
1531 	const struct s32cc_clk *clk = s32cc_obj2clk(module);  in get_clk_freq()  local
1540 	if (clk == NULL) {  in get_clk_freq()
1545 	if (clk->module != NULL) {  in get_clk_freq()
1546 		return get_module_rate(clk->module, drv, rate, ldepth);  in get_clk_freq()
1549 	if (clk->pclock == NULL) {  in get_clk_freq()
1554 	return get_clk_freq(&clk->pclock->desc, drv, rate, ldepth);  in get_clk_freq()
1804 	const struct s32cc_clk *clk = s32cc_get_arch_clk(mux->source_id);  in set_mux_freq()  local
1812 	if (clk == NULL) {  in set_mux_freq()
1818 	return set_module_rate(&clk->desc, rate, orate, depth);  in set_mux_freq()
1826 	const struct s32cc_clk *clk = s32cc_get_arch_clk(mux->source_id);  in get_mux_freq()  local
1835 	if (clk == NULL) {  in get_mux_freq()
1841 	return get_clk_freq(&clk->desc, drv, rate, ldepth);  in get_mux_freq()
2092 	const struct s32cc_clk *clk;  in s32cc_clk_set_rate()  local
2095 	clk = s32cc_get_arch_clk(id);  in s32cc_clk_set_rate()
2096 	if (clk == NULL) {  in s32cc_clk_set_rate()
2100 	ret = set_module_rate(&clk->desc, rate, orate, &depth);  in s32cc_clk_set_rate()
2113 	const struct s32cc_clk *clk;  in s32cc_clk_get_rate()  local
2117 	clk = s32cc_get_arch_clk(id);  in s32cc_clk_get_rate()
2118 	if (clk == NULL) {  in s32cc_clk_get_rate()
2122 	ret = get_module_rate(&clk->desc, drv, &rate, depth);  in s32cc_clk_get_rate()
2181 	const struct s32cc_clk *clk;  in s32cc_clk_get_parent()  local
2185 	clk = s32cc_get_arch_clk(id);  in s32cc_clk_get_parent()
2186 	if (clk == NULL) {  in s32cc_clk_get_parent()
2190 	parent = get_module_parent(clk->module);  in s32cc_clk_get_parent()
2215 	const struct s32cc_clk *clk;  in s32cc_clk_set_parent()  local
2220 	clk = s32cc_get_arch_clk(id);  in s32cc_clk_set_parent()
2221 	if (clk == NULL) {  in s32cc_clk_set_parent()
2230 	if (!is_s32cc_clk_mux(clk)) {  in s32cc_clk_set_parent()
2235 	mux = s32cc_clk2mux(clk);  in s32cc_clk_set_parent()