614 static int cgm_mux_clk_config(uintptr_t cgm_addr, uint32_t mux, uint32_t source,  in cgm_mux_clk_config()  argument
619 	css = mmio_read_32(CGM_MUXn_CSS(cgm_addr, mux));  in cgm_mux_clk_config()
629 	while ((mmio_read_32(CGM_MUXn_CSS(cgm_addr, mux)) &  in cgm_mux_clk_config()
633 	csc = mmio_read_32(CGM_MUXn_CSC(cgm_addr, mux));  in cgm_mux_clk_config()
646 	mmio_write_32(CGM_MUXn_CSC(cgm_addr, mux), csc);  in cgm_mux_clk_config()
649 	while ((mmio_read_32(CGM_MUXn_CSC(cgm_addr, mux)) &  in cgm_mux_clk_config()
654 	while ((mmio_read_32(CGM_MUXn_CSS(cgm_addr, mux)) &  in cgm_mux_clk_config()
662 	css = mmio_read_32(CGM_MUXn_CSS(cgm_addr, mux));  in cgm_mux_clk_config()
670 		      mux, source, cgm_addr);  in cgm_mux_clk_config()
679 		      mux, cgm_addr);  in cgm_mux_clk_config()
688 	uintptr_t cgm_addr = UL(0x0);  in enable_cgm_mux()  local
692 	ret = get_base_addr(mux->module, drv, &cgm_addr);  in enable_cgm_mux()
699 	return cgm_mux_clk_config(cgm_addr, mux->index,  in enable_cgm_mux()
1093 static void cgm_mux_div_config(uintptr_t cgm_addr, uint32_t mux,  in cgm_mux_div_config()  argument
1097 	uint32_t dc_val = mmio_read_32(MC_CGM_MUXn_DCm(cgm_addr, mux, div_index));  in cgm_mux_div_config()
1106 	mmio_write_32(MC_CGM_MUXn_DCm(cgm_addr, mux, div_index),  in cgm_mux_div_config()
1111 		updstat = mmio_read_32(MC_CGM_MUXn_DIV_UPD_STAT(cgm_addr, mux));  in cgm_mux_div_config()
1155 	uintptr_t cgm_addr = 0ULL;  in enable_cgm_div()  local
1181 	ret = get_base_addr(mux->module, drv, &cgm_addr);  in enable_cgm_div()
1192 		      mux->index, cgm_addr);  in enable_cgm_div()
1207 	cgm_mux_div_config(cgm_addr, mux->index, dc - 1U, cgm_div->index);  in enable_cgm_div()
1234 static inline bool is_cgm_div_enabled(uintptr_t cgm_addr, uint32_t mux,  in is_cgm_div_enabled()  argument
1239 	dc_val = mmio_read_32(MC_CGM_MUXn_DCm(cgm_addr, mux, div_index));  in is_cgm_div_enabled()
1244 static unsigned long calc_cgm_div_freq(uintptr_t cgm_addr, uint32_t mux,  in calc_cgm_div_freq()  argument
1250 	dc_val = mmio_read_32(MC_CGM_MUXn_DCm(cgm_addr, mux, div_index));  in calc_cgm_div_freq()
1263 	uintptr_t cgm_addr = 0ULL;  in get_cgm_div_freq()  local
1282 	ret = get_base_addr(mux->module, drv, &cgm_addr);  in get_cgm_div_freq()
1289 	if (!is_cgm_div_enabled(cgm_addr, mux->index, cgm_div->index)) {  in get_cgm_div_freq()
1297 		      mux->index, cgm_addr);  in get_cgm_div_freq()
1301 	*rate = calc_cgm_div_freq(cgm_addr, mux->index, cgm_div->index, pfreq);  in get_cgm_div_freq()