256 	reg_set16((reg_offset * PHY_SHFT(USB3) + addr), data, mask);  in comphy_usb3_set_direct()
283 		reg_set16(SGMIIPHY_ADDR(addr, sd_ip_addr), val, 0xFFFF);  in comphy_sgmii_phy_init()
445 	reg_set16(SGMIIPHY_ADDR(COMPHY_POWER_PLL_CTRL, sd_ip_addr), data, mask);  in mvebu_a3700_comphy_sgmii_power_on()
453 	reg_set16(SGMIIPHY_ADDR(COMPHY_MISC_CTRL0, sd_ip_addr), data, mask);  in mvebu_a3700_comphy_sgmii_power_on()
465 	reg_set16(SGMIIPHY_ADDR(COMPHY_POWER_PLL_CTRL, sd_ip_addr), data, mask);  in mvebu_a3700_comphy_sgmii_power_on()
480 	reg_set16(SGMIIPHY_ADDR(COMPHY_DIG_LOOPBACK_EN, sd_ip_addr),  in mvebu_a3700_comphy_sgmii_power_on()
527 	reg_set16(SGMIIPHY_ADDR(COMPHY_SYNC_PATTERN, sd_ip_addr), data, mask);  in mvebu_a3700_comphy_sgmii_power_on()
825 	reg_set16(LANE_CFG1_ADDR(PCIE) + COMPHY_SD_ADDR,  in mvebu_a3700_comphy_pcie_power_on()
829 	reg_set16(CLK_SRC_LO_ADDR(PCIE) + COMPHY_SD_ADDR,  in mvebu_a3700_comphy_pcie_power_on()
833 	reg_set16(MISC_CTRL1_ADDR(PCIE) + COMPHY_SD_ADDR,  in mvebu_a3700_comphy_pcie_power_on()
837 	reg_set16(PWR_MGM_TIM1_ADDR(PCIE) + COMPHY_SD_ADDR,  in mvebu_a3700_comphy_pcie_power_on()
843 	reg_set16(IDLE_SYNC_EN_ADDR(PCIE) + COMPHY_SD_ADDR,  in mvebu_a3700_comphy_pcie_power_on()
847 	reg_set16(MISC_CTRL0_ADDR(PCIE) + COMPHY_SD_ADDR,  in mvebu_a3700_comphy_pcie_power_on()
866 	reg_set16(PWR_PLL_CTRL_ADDR(PCIE) + COMPHY_SD_ADDR,  in mvebu_a3700_comphy_pcie_power_on()
872 	reg_set16(KVCO_CAL_CTRL_ADDR(PCIE) + COMPHY_SD_ADDR,  in mvebu_a3700_comphy_pcie_power_on()
884 	reg_set16(SYNC_PATTERN_ADDR(PCIE) + COMPHY_SD_ADDR, data, mask);  in mvebu_a3700_comphy_pcie_power_on()
889 	reg_set16(RST_CLK_CTRL_ADDR(PCIE) + COMPHY_SD_ADDR, data, mask);  in mvebu_a3700_comphy_pcie_power_on()