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5 SoCs with ARMv8 cores. Only BL31 is used to provide proper EL3 setup and
37 So for instance to build for a board with the Allwinner A64 SoC::
45 some build options that allow to fine-tune the firmware, or to disable support
50    to be loaded into the ARISC SCP (A64, H5), or the power sequence control
51    registers to be programmed directly (H6, H616). This supports only basic
53    This option defaults to 1. If an active SCP supporting the SCPI protocol
58    powerup sequence by talking to the SCP processor via the SCPI protocol.
59    This allows more advanced power saving techniques, like suspend to RAM.
60    This option defaults to 1 on SoCs that feature an SCP. If no SCP firmware
66    power management controller, BL31 tries to set up all needed power rails,
67    programming them to their respective voltages. That allows bootloader
68    software like U-Boot to ignore power control via the PMIC.
69    This setting defaults to 1. In some situations that enables too many
70    regulators, or some regulators need to be enabled in a very specific
72    can bet set to ``0`` on the build command line, to skip the PMIC setup
73    entirely. Any bootloader or OS would need to setup the PMIC on its own then.
82 After building bl31.bin, the binary must be fed to the U-Boot build system
83 to include it in the FIT image that the SPL loader will process.
96 BL31 lives in SRAM A2, which is documented to be accessible from secure
98 several measures to reduce memory consumption. One of them is to confine
99 BL31 to only 28 bits of virtual address space, which reduces the number
130 lacks the "ARISC" management processor (SCP) we use. BL31 thus needs to
142 In order to include the 'opteed' dispatcher in the image, pass 'SPD=opteed' on the command line
143 while compiling the bl31 image and make sure the loader (SPL) loads the Trusted OS binary to