Lines Matching refs:gicc_base
137 vaddr_t gicc_base; member
190 static size_t probe_max_it(vaddr_t gicc_base __maybe_unused, vaddr_t gicd_base) in probe_max_it()
205 old_ctlr = io_read32(gicc_base + GICC_CTLR); in probe_max_it()
206 io_write32(gicc_base + GICC_CTLR, 0); in probe_max_it()
228 io_write32(gicc_base + GICC_CTLR, old_ctlr); in probe_max_it()
349 io_write32(gd->gicc_base + GICC_PMR, 0x80); in init_gic_per_cpu()
352 io_write32(gd->gicc_base + GICC_CTLR, in init_gic_per_cpu()
365 assert(gd->gicd_base && gd->gicc_base); in gic_init_per_cpu()
526 vaddr_t gicc_base = 0; in gic_init_base_addr() local
545 gicc_base = core_mmu_get_va(gicc_base_pa, MEM_AREA_IO_SEC, in gic_init_base_addr()
547 if (!gicc_base) in gic_init_base_addr()
551 gd->gicc_base = gicc_base; in gic_init_base_addr()
553 gd->max_it = probe_max_it(gicc_base, gicd_base); in gic_init_base_addr()
631 io_write32(gd->gicc_base + GICC_PMR, 0x80); in gic_init_v3()
634 io_write32(gd->gicc_base + GICC_CTLR, GICC_CTLR_FIQEN | in gic_init_v3()
847 return io_read32(gd->gicc_base + GICC_IAR); in gic_read_iar()
858 io_write32(gd->gicc_base + GICC_EOIR, eoir); in gic_write_eoir()
900 DMSG("GICC_CTLR: %#"PRIx32, io_read32(gd->gicc_base + GICC_CTLR)); in gic_dump_state()