Lines Matching refs:risab
114 static vaddr_t risab_base(struct stm32_risab_pdata *risab) in risab_base() argument
116 return io_pa_or_va_secure(&risab->base, 1); in risab_base()
121 struct stm32_risab_pdata *risab = NULL; in stm32_risab_clear_illegal_access_flags() local
123 SLIST_FOREACH(risab, &risab_list, link) { in stm32_risab_clear_illegal_access_flags()
124 vaddr_t base = risab_base(risab); in stm32_risab_clear_illegal_access_flags()
137 struct stm32_risab_pdata *risab = NULL; in stm32_risab_print_erroneous_data() local
139 SLIST_FOREACH(risab, &risab_list, link) { in stm32_risab_print_erroneous_data()
140 vaddr_t base = risab_base(risab); in stm32_risab_print_erroneous_data()
146 EMSG("\n\nDUMPING DATA FOR %s\n\n", risab->risab_name); in stm32_risab_print_erroneous_data()
293 static TEE_Result set_rif_registers(struct stm32_risab_pdata *risab, in set_rif_registers() argument
298 assert(&risab->subr_cfg[reg_idx]); in set_rif_registers()
300 subr_cfg = &risab->subr_cfg[reg_idx]; in set_rif_registers()
307 if (!regs_access_granted(risab, reg_idx)) in set_rif_registers()
310 set_block_dprivcfgr(risab, subr_cfg); in set_rif_registers()
311 set_block_seccfgr(risab, subr_cfg); in set_rif_registers()
317 set_read_conf(risab, subr_cfg); in set_rif_registers()
318 set_write_conf(risab, subr_cfg); in set_rif_registers()
319 set_cid_priv_conf(risab, subr_cfg); in set_rif_registers()
321 if (virt_to_phys((void *)risab_base(risab)) != RISAB1_BASE && in set_rif_registers()
322 virt_to_phys((void *)risab_base(risab)) != RISAB2_BASE) { in set_rif_registers()
326 risab->risab_name, reg_idx); in set_rif_registers()
328 set_cidcfgr(risab, subr_cfg); in set_rif_registers()
330 set_cidcfgr(risab, subr_cfg); in set_rif_registers()
587 get_subreg_by_range(struct stm32_risab_pdata *risab, paddr_t paddr, size_t size) in get_subreg_by_range() argument
592 for (i = 0; i < risab->nb_regions_cfged; i++) { in get_subreg_by_range()
593 unsigned int first_page = (paddr - risab->region_cfged.base) / in get_subreg_by_range()
596 if (first_page == risab->subr_cfg[i].first_page && in get_subreg_by_range()
597 nb_page == risab->subr_cfg[i].nb_pages_cfged) in get_subreg_by_range()
598 return risab->subr_cfg + i; in get_subreg_by_range()
609 struct stm32_risab_pdata *risab = NULL; in stm32_risab_check_access() local
623 risab = fw->ctrl->priv; in stm32_risab_check_access()
624 base = risab_base(risab); in stm32_risab_check_access()
643 reg_conf = get_subreg_by_range(risab, paddr, size); in stm32_risab_check_access()
695 struct stm32_risab_pdata *risab = NULL; in stm32_risab_reconfigure_region() local
703 risab = fw->ctrl->priv; in stm32_risab_reconfigure_region()
718 sub_region_offset = paddr - risab->region_cfged.base; in stm32_risab_reconfigure_region()
719 if (!core_is_buffer_inside(paddr, size, risab->region_cfged.base, in stm32_risab_reconfigure_region()
720 risab->region_cfged.size)) in stm32_risab_reconfigure_region()
728 for (i = 0; i < risab->nb_regions_cfged; i++) { in stm32_risab_reconfigure_region()
730 risab->subr_cfg[i].first_page || in stm32_risab_reconfigure_region()
732 risab->subr_cfg[i].nb_pages_cfged) in stm32_risab_reconfigure_region()
735 parse_risab_rif_conf(risab, &risab->subr_cfg[i], fw->args[0], in stm32_risab_reconfigure_region()
741 if (i == risab->nb_regions_cfged) in stm32_risab_reconfigure_region()
745 risab->risab_name, risab->subr_cfg[i].first_page, in stm32_risab_reconfigure_region()
746 risab->subr_cfg[i].first_page + in stm32_risab_reconfigure_region()
747 risab->subr_cfg[i].nb_pages_cfged - 1, in stm32_risab_reconfigure_region()
748 risab->subr_cfg[i].seccfgr ? "Secure" : "Non secure", in stm32_risab_reconfigure_region()
749 risab->subr_cfg[i].dprivcfgr ? "Default priv" : "Default unpriv", in stm32_risab_reconfigure_region()
750 risab->subr_cfg[i].cidcfgr, in stm32_risab_reconfigure_region()
755 exceptions = cpu_spin_lock_xsave(&risab->conf_lock); in stm32_risab_reconfigure_region()
757 res = set_rif_registers(risab, i); in stm32_risab_reconfigure_region()
759 cpu_spin_unlock_xrestore(&risab->conf_lock, exceptions); in stm32_risab_reconfigure_region()
764 static TEE_Result stm32_risab_pm_resume(struct stm32_risab_pdata *risab) in stm32_risab_pm_resume() argument
768 if (risab->base.pa == RISAB6_BASE) in stm32_risab_pm_resume()
769 set_vderam_syscfg(risab); in stm32_risab_pm_resume()
770 enable_srwiad_if_set(risab); in stm32_risab_pm_resume()
771 clear_iac_regs(risab); in stm32_risab_pm_resume()
773 for (i = 0; i < risab->nb_regions_cfged; i++) { in stm32_risab_pm_resume()
774 if (set_rif_registers(risab, i)) in stm32_risab_pm_resume()
778 disable_srwiad_if_unset(risab); in stm32_risab_pm_resume()
783 static TEE_Result stm32_risab_pm_suspend(struct stm32_risab_pdata *risab) in stm32_risab_pm_suspend() argument
785 vaddr_t base = risab_base(risab); in stm32_risab_pm_suspend()
788 for (i = 0; i < risab->nb_regions_cfged; i++) { in stm32_risab_pm_suspend()
790 unsigned int first_page = risab->subr_cfg[i].first_page; in stm32_risab_pm_suspend()
793 risab->subr_cfg[i].seccfgr = in stm32_risab_pm_suspend()
795 risab->subr_cfg[i].dprivcfgr = in stm32_risab_pm_suspend()
797 risab->subr_cfg[i].cidcfgr = in stm32_risab_pm_suspend()
801 risab->subr_cfg[i].rlist[j] = in stm32_risab_pm_suspend()
803 risab->subr_cfg[i].wlist[j] = in stm32_risab_pm_suspend()
805 risab->subr_cfg[i].plist[j] = in stm32_risab_pm_suspend()
817 struct stm32_risab_pdata *risab = pm_handle->handle; in stm32_risab_pm() local
824 res = stm32_risab_pm_resume(risab); in stm32_risab_pm()
826 res = stm32_risab_pm_suspend(risab); in stm32_risab_pm()