Lines Matching refs:freq
111 unsigned long freq; member
779 return osci->freq; in clk_stm32_get_rate_oscillator()
860 if (!osci->freq) in stm32_enable_oscillator_hse()
878 if (!osci->freq) in stm32_enable_oscillator_lse()
898 if (!osci->freq) in stm32_enable_oscillator_lsi()
932 if (!osci->freq) in stm32_enable_oscillator_msi()
935 if (clk_stm32_osc_msi_set_rate(priv, osci->freq) != TEE_SUCCESS) { in stm32_enable_oscillator_msi()
937 osci->freq); in stm32_enable_oscillator_msi()
964 if (osci->freq && stm32_gate_wait_ready(osc_data->gate_id, true)) in stm32_clk_oscillators_wait_lse_ready()
1038 osci->freq = 0; in stm32_clk_parse_oscillator_fdt()
1059 osci->freq = fdt32_to_cpu(*cuint); in stm32_clk_parse_oscillator_fdt()
2069 unsigned long freq = 0; in clk_get_pll1_fvco_rate() local
2077 if (!refdiv || MUL_OVERFLOW(refclk, fbdiv, &freq)) in clk_get_pll1_fvco_rate()
2080 return freq / refdiv; in clk_get_pll1_fvco_rate()
2318 unsigned long freq = prate; in clk_stm32_flexgen_get_rate() local
2325 if (!freq) in clk_stm32_flexgen_get_rate()
2333 freq /= 2; in clk_stm32_flexgen_get_rate()
2337 freq /= 4; in clk_stm32_flexgen_get_rate()
2341 freq /= 1024; in clk_stm32_flexgen_get_rate()
2350 freq /= findiv + 1; in clk_stm32_flexgen_get_rate()
2352 return freq; in clk_stm32_flexgen_get_rate()
2369 unsigned long freq = 0; in clk_stm32_flexgen_get_round_rate() local
2373 freq = UDIV_ROUND_NEAREST((uint64_t)prate, pre_div[i]); in clk_stm32_flexgen_get_round_rate()
2374 ratio = UDIV_ROUND_NEAREST((uint64_t)freq, rate); in clk_stm32_flexgen_get_round_rate()
2381 freq = UDIV_ROUND_NEAREST((uint64_t)freq, ratio); in clk_stm32_flexgen_get_round_rate()
2382 if (freq < rate) in clk_stm32_flexgen_get_round_rate()
2383 diff = rate - freq; in clk_stm32_flexgen_get_round_rate()
2385 diff = freq - rate; in clk_stm32_flexgen_get_round_rate()