1632 static int wait_predivsr(uint16_t channel)  in wait_predivsr()  argument
1639 	if (channel < __WORD_BIT) {  in wait_predivsr()
1641 		channel_bit = BIT(channel);  in wait_predivsr()
1644 		channel_bit = BIT(channel - __WORD_BIT);  in wait_predivsr()
1656 static int wait_findivsr(uint16_t channel)  in wait_findivsr()  argument
1663 	if (channel < __WORD_BIT) {  in wait_findivsr()
1665 		channel_bit = BIT(channel);  in wait_findivsr()
1668 		channel_bit = BIT(channel - __WORD_BIT);  in wait_findivsr()
1680 static int wait_xbar_sts(uint16_t channel)  in wait_xbar_sts()  argument
1683 	uintptr_t xbar_cfgr = rcc_base + RCC_XBAR0CFGR + (0x4 * channel);  in wait_xbar_sts()
1689 		EMSG("XBAR%"PRIu16"CFGR: %#"PRIx32, channel,  in wait_xbar_sts()
1697 static TEE_Result flexclkgen_search_config(uint16_t channel,  in flexclkgen_search_config()  argument
1720 		if (flex_id == channel) {  in flexclkgen_search_config()
1732 static void flexclkgen_config_channel(uint16_t channel, unsigned int clk_src,  in flexclkgen_config_channel()  argument
1737 	if (wait_predivsr(channel))  in flexclkgen_config_channel()
1740 	io_clrsetbits32(rcc_base + RCC_PREDIV0CFGR + (0x4 * channel),  in flexclkgen_config_channel()
1743 	if (wait_predivsr(channel))  in flexclkgen_config_channel()
1746 	if (wait_findivsr(channel))  in flexclkgen_config_channel()
1749 	io_clrsetbits32(rcc_base + RCC_FINDIV0CFGR + (0x4 * channel),  in flexclkgen_config_channel()
1753 	if (wait_findivsr(channel))  in flexclkgen_config_channel()
1756 	if (wait_xbar_sts(channel))  in flexclkgen_config_channel()
1759 	io_clrsetbits32(rcc_base + RCC_XBAR0CFGR + (0x4 * channel),  in flexclkgen_config_channel()
1763 	io_setbits32(rcc_base + RCC_XBAR0CFGR + (0x4 * channel),  in flexclkgen_config_channel()
1766 	if (wait_xbar_sts(channel))  in flexclkgen_config_channel()
1779 		unsigned int channel = 0;  in stm32mp2_clk_flexgen_configure()  local
1790 		channel = (cmd_data & FLEX_ID_MASK) >> FLEX_ID_SHIFT;  in stm32mp2_clk_flexgen_configure()
1796 		if (channel == FLEX_STGEN)  in stm32mp2_clk_flexgen_configure()
1803 		flexclkgen_config_channel(channel, clk_src, pdiv, fdiv);  in stm32mp2_clk_flexgen_configure()
2299 	uint16_t channel = cfg->flex_id * 4;  in clk_stm32_flexgen_set_parent()  local
2301 	io_clrsetbits32(rcc_base + RCC_XBAR0CFGR + (channel),  in clk_stm32_flexgen_set_parent()
2304 	if (wait_xbar_sts(channel))  in clk_stm32_flexgen_set_parent()
2317 	uint8_t channel = cfg->flex_id;  in clk_stm32_flexgen_get_rate()  local
2320 	prediv = io_read32(rcc_base + RCC_PREDIV0CFGR + (0x4 * channel)) &  in clk_stm32_flexgen_get_rate()
2322 	findiv = io_read32(rcc_base + RCC_FINDIV0CFGR + (0x4 * channel)) &  in clk_stm32_flexgen_get_rate()
2405 	uint8_t channel = cfg->flex_id;  in clk_stm32_flexgen_set_rate()  local
2412 	if (wait_predivsr(channel))  in clk_stm32_flexgen_set_rate()
2415 	io_clrsetbits32(rcc_base + RCC_PREDIV0CFGR + (0x4 * channel),  in clk_stm32_flexgen_set_rate()
2419 	if (wait_predivsr(channel))  in clk_stm32_flexgen_set_rate()
2422 	if (wait_findivsr(channel))  in clk_stm32_flexgen_set_rate()
2425 	io_clrsetbits32(rcc_base + RCC_FINDIV0CFGR + (0x4 * channel),  in clk_stm32_flexgen_set_rate()
2429 	if (wait_findivsr(channel))  in clk_stm32_flexgen_set_rate()
2440 	uint8_t channel = cfg->flex_id;  in clk_stm32_flexgen_enable()  local
2446 	if (channel == FLEX_STGEN) {  in clk_stm32_flexgen_enable()
2451 		ret = flexclkgen_search_config(channel, &clk_src, &pdiv, &fdiv);  in clk_stm32_flexgen_enable()
2458 		flexclkgen_config_channel(channel, clk_src, pdiv, fdiv);  in clk_stm32_flexgen_enable()
2464 	io_setbits32(rcc_base + RCC_FINDIV0CFGR + (0x4 * channel),  in clk_stm32_flexgen_enable()
2474 	uint8_t channel = cfg->flex_id;  in clk_stm32_flexgen_disable()  local
2476 	io_clrbits32(rcc_base + RCC_FINDIV0CFGR + (0x4 * channel),  in clk_stm32_flexgen_disable()