1628 static int wait_predivsr(uint16_t channel)  in wait_predivsr()  argument
1635 	if (channel < __WORD_BIT) {  in wait_predivsr()
1637 		channel_bit = BIT(channel);  in wait_predivsr()
1640 		channel_bit = BIT(channel - __WORD_BIT);  in wait_predivsr()
1652 static int wait_findivsr(uint16_t channel)  in wait_findivsr()  argument
1659 	if (channel < __WORD_BIT) {  in wait_findivsr()
1661 		channel_bit = BIT(channel);  in wait_findivsr()
1664 		channel_bit = BIT(channel - __WORD_BIT);  in wait_findivsr()
1676 static int wait_xbar_sts(uint16_t channel)  in wait_xbar_sts()  argument
1679 	uintptr_t xbar_cfgr = rcc_base + RCC_XBAR0CFGR + (0x4 * channel);  in wait_xbar_sts()
1685 		EMSG("XBAR%"PRIu16"CFGR: %#"PRIx32, channel,  in wait_xbar_sts()
1693 static TEE_Result flexclkgen_search_config(uint16_t channel,  in flexclkgen_search_config()  argument
1716 		if (flex_id == channel) {  in flexclkgen_search_config()
1728 static void flexclkgen_config_channel(uint16_t channel, unsigned int clk_src,  in flexclkgen_config_channel()  argument
1733 	if (wait_predivsr(channel))  in flexclkgen_config_channel()
1736 	io_clrsetbits32(rcc_base + RCC_PREDIV0CFGR + (0x4 * channel),  in flexclkgen_config_channel()
1739 	if (wait_predivsr(channel))  in flexclkgen_config_channel()
1742 	if (wait_findivsr(channel))  in flexclkgen_config_channel()
1745 	io_clrsetbits32(rcc_base + RCC_FINDIV0CFGR + (0x4 * channel),  in flexclkgen_config_channel()
1749 	if (wait_findivsr(channel))  in flexclkgen_config_channel()
1752 	if (wait_xbar_sts(channel))  in flexclkgen_config_channel()
1755 	io_clrsetbits32(rcc_base + RCC_XBAR0CFGR + (0x4 * channel),  in flexclkgen_config_channel()
1759 	io_setbits32(rcc_base + RCC_XBAR0CFGR + (0x4 * channel),  in flexclkgen_config_channel()
1762 	if (wait_xbar_sts(channel))  in flexclkgen_config_channel()
1775 		unsigned int channel = 0;  in stm32mp2_clk_flexgen_configure()  local
1786 		channel = (cmd_data & FLEX_ID_MASK) >> FLEX_ID_SHIFT;  in stm32mp2_clk_flexgen_configure()
1792 		if (channel == FLEX_STGEN)  in stm32mp2_clk_flexgen_configure()
1799 		flexclkgen_config_channel(channel, clk_src, pdiv, fdiv);  in stm32mp2_clk_flexgen_configure()
2267 	uint16_t channel = cfg->flex_id * 4;  in clk_stm32_flexgen_set_parent()  local
2270 		io_clrsetbits32(rcc_base + RCC_XBAR0CFGR + (channel),  in clk_stm32_flexgen_set_parent()
2273 		if (wait_xbar_sts(channel))  in clk_stm32_flexgen_set_parent()
2287 	uint8_t channel = cfg->flex_id;  in clk_stm32_flexgen_get_rate()  local
2290 	prediv = io_read32(rcc_base + RCC_PREDIV0CFGR + (0x4 * channel)) &  in clk_stm32_flexgen_get_rate()
2292 	findiv = io_read32(rcc_base + RCC_FINDIV0CFGR + (0x4 * channel)) &  in clk_stm32_flexgen_get_rate()
2377 	uint8_t channel = cfg->flex_id;  in clk_stm32_flexgen_set_rate()  local
2387 	if (wait_predivsr(channel))  in clk_stm32_flexgen_set_rate()
2390 	io_clrsetbits32(rcc_base + RCC_PREDIV0CFGR + (0x4 * channel),  in clk_stm32_flexgen_set_rate()
2394 	if (wait_predivsr(channel))  in clk_stm32_flexgen_set_rate()
2397 	if (wait_findivsr(channel))  in clk_stm32_flexgen_set_rate()
2400 	io_clrsetbits32(rcc_base + RCC_FINDIV0CFGR + (0x4 * channel),  in clk_stm32_flexgen_set_rate()
2404 	if (wait_findivsr(channel))  in clk_stm32_flexgen_set_rate()
2415 	uint8_t channel = cfg->flex_id;  in clk_stm32_flexgen_enable()  local
2417 	if (!stm32_rcc_has_access_by_id(channel))  in clk_stm32_flexgen_enable()
2424 	if (channel == FLEX_STGEN) {  in clk_stm32_flexgen_enable()
2429 		ret = flexclkgen_search_config(channel, &clk_src, &pdiv, &fdiv);  in clk_stm32_flexgen_enable()
2436 		flexclkgen_config_channel(channel, clk_src, pdiv, fdiv);  in clk_stm32_flexgen_enable()
2442 	io_setbits32(rcc_base + RCC_FINDIV0CFGR + (0x4 * channel),  in clk_stm32_flexgen_enable()
2452 	uint8_t channel = cfg->flex_id;  in clk_stm32_flexgen_disable()  local
2455 		io_clrbits32(rcc_base + RCC_FINDIV0CFGR + (0x4 * channel),  in clk_stm32_flexgen_disable()