883 	uint16_t reg_pllxcr;  member
912 		.reg_pllxcr = (_reg),\
1132 	uintptr_t pll_base = priv->base + pll->reg_pllxcr;  in clk_stm32_is_pll_config_on_the_fly()
1186 	uintptr_t pll_base = priv->base + pll->reg_pllxcr;  in clk_stm32_pll_config_vco()
1211 	uintptr_t pll_base = priv->base + pll->reg_pllxcr;  in clk_stm32_pll_config_csg()
1239 	uintptr_t pll_base = priv->base + pll->reg_pllxcr;  in clk_stm32_pll_config_out()
1276 	uintptr_t addr = priv->base + pll->reg_pllxcr;  in clk_stm32_pll_backup_output_diven()
1287 	uintptr_t addr = priv->base + pll->reg_pllxcr;  in clk_stm32_pll_restore_output_diven()
1319 			io_clrbits32(priv->base + pll->reg_pllxcr,  in clk_stm32_pll_init()
1700 	uint32_t reg_pllxcr;  member
1717 	uintptr_t pll_base = priv->base + cfg->reg_pllxcr;  in clk_stm32_pll_get_rate()
1774 	uintptr_t pll_base = priv->base + cfg->reg_pllxcr;  in clk_stm32_pll_disable()
1973 			.reg_pllxcr	= (_reg),\
2057 		.reg_pllxcr	= RCC_PLL1CR,