Lines Matching +full:1 +full:kib
21 * 1MB into the SDRAM to allow for SPL's bss at the beginning of SDRAM
41 #define V_SCLK (V_OSCK >> 1)
87 #define CONFIG_SYS_OMAP24_I2C_SLAVE 1
123 /* NAND block size is 128 KiB. Synchronize these values with
125 * MLO(SPL) 4 * NAND_BLOCK_SIZE = 512 KiB @ 0x000000
126 * U-Boot 15 * NAND_BLOCK_SIZE = 1920 KiB @ 0x080000
127 * U-Boot environment 2 * NAND_BLOCK_SIZE = 256 KiB @ 0x260000
129 * DTB 4 * NAND_BLOCK_SIZE = 512 KiB @ 0xAA0000
161 "mmcpart=1\0" \
236 #define CONFIG_SYS_PTV 2 /* Divisor: 2^(PTV+1) => 8 */
264 #define CONFIG_SYS_ENV_SECT_SIZE (128 << 10) /* 128 KiB */
280 #define CONFIG_SYS_MMCSD_FS_BOOT_PARTITION 1