Lines Matching +full:zynqmp +full:- +full:8

10  * SPDX-License-Identifier:	GPL-2.0+
25 /* Default to the ZYNQMP XHCI defines */
53 #define USBOTGSS_IRQ_SET_1_IDPULLUP_RISE_EN	BIT(8)
75 	ret = dwc3_core_init(zynqmp_xhci->dwc3_reg);  in zynqmp_xhci_core_init()
81 	/* We are hard-coding DWC3 core to Host Mode */  in zynqmp_xhci_core_init()
82 	dwc3_set_mode(zynqmp_xhci->dwc3_reg, DWC3_GCTL_PRTCAP_HOST);  in zynqmp_xhci_core_init()
90 	 * Currently zynqmp socs do not support PHY shutdown from  in xhci_hcd_stop()
104 	ctx->hcd = (struct xhci_hccr *)plat->hcd_base;  in xhci_usb_probe()
105 	ctx->dwc3_reg = (struct dwc3 *)((char *)(ctx->hcd) + DWC3_REG_OFFSET);  in xhci_usb_probe()
110 		return -EINVAL;  in xhci_usb_probe()
113 	hcor = (struct xhci_hcor *)((ulong)ctx->hcd +  in xhci_usb_probe()
114 				  HC_LENGTH(xhci_readl(&ctx->hcd->cr_capbase)));  in xhci_usb_probe()
116 	return xhci_register(dev, ctx->hcd, hcor);  in xhci_usb_probe()
127 	const void *blob = gd->fdt_blob;  in xhci_usb_ofdata_to_platdata()
130 	plat->hcd_base = fdtdec_get_addr(blob, dev_of_offset(dev), "reg");  in xhci_usb_ofdata_to_platdata()
131 	if (plat->hcd_base == FDT_ADDR_T_NONE) {  in xhci_usb_ofdata_to_platdata()
133 		return -ENXIO;  in xhci_usb_ofdata_to_platdata()
140 	.name = "dwc3-generic-host",